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bq76920: FAQ confusion about possible EVM comm line damage

John M
Expert 2135 points
Other Parts Discussed in Thread: BQ76920

Hello,

Section 6.10 of the bq769x0 FAQ states that the communications lines could possibly be damaged if the clamp circuits are referenced to PACK- and the FETs turn off, including on the EVM. But on the bq76929 EVM it appears that the clamps and communication lines are referenced to BATT-, directly and via the net tie NT1.

Are there there any concerns when using the EVM with our own MCU for testing and the FETs are turned off? Our MCU will be using the J8 I2C header and its GND pin.

JohnM

  • 0
    TI__Guru 54715 points

    For evaluation you can use isolated equipment and provide a safe signal environment.  Be sure to provide any isolation needed for user safety.

    When you connect your microcontroller to J8, it operates on the battery side of the protection and should have no risk from protection.  Your micro operates with reference to BATT- which is the same as bq76920 VSS which it communicates with.  When the FETs turn off, Pack- can rise to Pack+.  In development your MCU emulator or interface is likely connected to earth ground in the PC.  Keep in mind that the Pack terminals will both have a positive voltage during protection, use isolated test equipment.

    If your product is a 2 terminal system with the MCU contained inside the system, there should be no concern. If you bring a communication port out of the system, then you must be concerned about providing safe paths and maintaining a signal reference path for the communication signals.  In this case the 4 techniques from the FAQ may be useful, or other isolated communication system.

  • 0 in reply to WM5295
    Expert 2135 points

    Thank you! And thank you for all your time taken to answer my other questions.

    We're operating the MCU on board with the bq76920 in the production version so we'll be OK there. We'll be sure to use isolated equipment during development when using the EVM.

    JohnM