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decoupling capacitors at the load of TPS54394

Other Parts Discussed in Thread: TPS54394

Hi 

I'm using TPS54394 to provide 1.0V (CVDDC) and 1.5V (DDR3) for the DaVinci DSP TMS320DM8168. The worst case current drawing is 2.5A for 1.0V and 2.3A for 1.5V. Input voltage is 12V for both rails. TPS54394 datasheet specifies a range of output capacitance (22uF - 68uF) to maintain the loop stability. However, the processor requires bulk and smaller bypass capacitors at the load. In particular, it requires at least 20 small capacitors (0.1uF) and one bulk (15uF or larger) capacitor for every 10 small ones for the 1.0V (CVDDC) rail. As for the 1.5V (DDR3), the requirement is at least 6 bulk capacitors with total capacitance no less than 140uF, and at least 70 high-speed bypass capacitors with total capacitance of no less than 5uF. My question is, would so many bulk and bypass capacitors at the load (processor) cause TPS54394 instable? 

Thanks,

Nikko

  • I don't see a big issue with the 1.0 V load capacitance (we're only talking about 32uF added).  6x140 uF is quite a bit on the 1.5V rail and you are probably going to use a capacitor with some ESR.  The ESR zero may cause issues for you.  I would recommend that you try that load on a modified EVM to see if there are any issues with it.  I have seen some cases where users successfully used extra capacitance on similar parts.

  • Hi John,

    Thank you for your prompt response. Per the processor spec, the total bulk capacitance is 140uF, breaking into 6 capacitors, not 6x140uF. If I use 6x22uF, low ESR ceramic capacitors, would it also be a problem? 

    Nikko

  • 6x22uF ceramic would be your best option.  You should still probably check it on a prototype or modified EVM, but I am pretty confident that it will be ok.  IIRC, I have tested with 200uF additional capacitance.