Looking for some words of wisdom on this product. We are planning on using the TPS61200 regulator to boost a super cap voltage (.5 to 2.7 V) to and operating voltage of 3.6V. We have designed our first pcb prototype but have notice an unusually high quiescent current at virtually no load(.1uA). Here are the some measured values for two cases:
1) Vin = 1; Vout = 3.6V; IQ = 16 mA.
2) Vin = 2; Vout = 3.6V; IQ = 14 mA.
We were expecting something around 50 uA! This circuit that we are designing has various load conditions ranging from 1uA to 150mA. However, 98% of the time is spent in a sleeping mode where we would like to achieve much lower sleeping currents. We connected the PS mode pin to VCC. All the functionality of the circuit works great other than the high sleeping current due to the regulator. My main question is, with a range of load currents such as (1uA to 150 mA), what would be a good recommendation for connecting the PS (power save mode). I understand from other posts that pulling this pin low aids in efficiency at low levels, But could this hurt us when we need the high current draw (150mA)? Any Ides, on how to get the high efficiency quiescent current and still be able to provide the burst of 120mA occasionally.
Below is an attached schematic of our power supply.
https://www.dropbox.com/s/fnsmnknriy7sl62/Screenshot%202014-07-30%2023.58.18.png
Thanks,
Jason