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LM27403 - Starts into fault state

Other Parts Discussed in Thread: LM27403

Hi,

By means of the Webench Design Tool I made a 3.3V switching regulator design (1212.webench_design_3.3V_1.2A_general.pdf). Furthermore I made a second design (1200.webench_design_5V_1.5A_general.pdf) for 5V. Both of them are implemented at one PCB, here are the schematics: 4621.EPS_v1.5.pdf.

Now both designs have been manufactured and they show some identical problems. The supply power comes from a isolated 12V DC/DC and is fine. After putting the UVLO/EN input to 3.3V (directly connected to a µC GPIO), the SS/TRACK voltage ramps up, but collapses very quickly down to 3.2mV. The PGOOD pin has a voltage of 0.2V. According to the datasheet the switching regulator is in a fault state and swtiched of nearly everything.

It seems that the temperature is measured incorrect. The voltage at the OTP is 2.5V which is way too high (if it exceeds 1.15V, an overtemperature fault is detected and the switching regulator switches of everything). So I measured the voltage at the D+ pin to see what is measured by means of the NPN transistor. Here is a picture:

Here I can see a deltaVbe of 2.24V which is also way too high. The PCB is at room temperature.

Now I am out of ideas, somehow the temperature seems to be measured incorrect, but I don't have any idea why.


To ensure that the overtemperature is the reason for not starting, I connected the OTP pin to GND (which disables the overtemperature feature). Furthermore I connected the FADJ pin to GND as well to increase to the maximum switching freuency. In this case, the switching regulator starts correctly and is working as expected. But only in this case.

Doas anyone has an idea what could be the problem?

Thanks a lot in advance!

  • Ok, after some more investigation I found out, that the Webench design is not that correct as it should be. The datasheets states that the D- input (used for the temperature measurement) hast du bie tied to GND. This important fact was not shown by the Wenebch design.

    After I connected D- to GND the voltages at D+ and OTP are reasonable. D+ shows the behaviour as axpected from the datasheet (deltaVbe of 60 mV) and the OTP pin has a voltage of 0.89 V.

    But unfortunately the main problem persists, after putting the UVLO/EN input tot 3.3V, the SS/TRACK voltage ramps up, but collapses very quickly down to 3.2mV. To be detailed, after putting UVLO/EN to a high level, SS/TRACK needs approx 1.6ms until ramping up. SS/TRACK collapses after 1.76ms. Until then it has reached a voltage of 210mV. The resistor at FADJ has a value of 52.5kR. So the PGOOD pin still has a voltage of 0.2V.

    But now, I am faced to a new strange behavior. Since it worked (more or less) with the config R_OTP=0R and R_FADJ=0R, I wanted to redo all the changes, so I disconnected D- from GND. But now the switching regulator shows a really weird behavior. It is not possible to start with a load, the regulator (or the incductor) makes strange noise). If started unloaded, a load can be connected after some seconds of startup. Then the regulator works fine. All in all, something is wrong and I'm (again) out of ideas.

  • Hi Raphael,

    Select an inductor with larger DCR to provide a workable current sense signal. For example, a 20mOhm DCR at 1.5A will produce 30mV sense voltage. Rset and Rcs should be scaled accordingly. The FADJ resistor sets the switching frequency (52.3kOhm corresponds to ~280kHz). D- should be tied to GND per datasheet guidelines. I will provide this information to the Webench team also.


    Regards,

    Tim

  • Hi Tim,

    thanks for the tip but selecting an inductor with larger DCR shouldn't be the way to solve the problem. This design has been selected due to its high efficiency and an inductor with such a 'high' DCR will decrease the efficiency significantly. Furthermore all the current sensing components (Rs, Cs, Rcs and Riset) have been dimensioned to match to this inductor with its low DCR. And finally the physical dimensions have been fixed already and it is very difficult to select a different inductor with different physical dimensions.

    Is it maybe possible to tune Riset and Rcs in that way that the problem is solved?

    I noticed the cpacitor Ccs between CS+ and CS-. Is this capacitor very important? Since in the Webench design this capacitor is not contained. Ok, mistake by myself, the capacitor is contained.

    Just for my understanding, according to your statement, is it correct that the CS input needs a minimum sense voltage to work porperly?

  • Hi Raphael,

    Yes, a workable current sense signal is required. Greater than 20mV is normally recommended to achieve acceptable current limit accuracy, mitigate current sense comparator offset voltage, etc.

    An inductor with such low DCR is not required for 1.5A output current. For example, 1.5A and 20mOhm DCR gives a copper loss of 45mW (or approximately 0.6% in efficiency). This also enables a reduction in size and cost of the inductor.


    Regards,

    Tim

  • Hi Tim,

    ok, does that mean that even in a normale operating state (not in an overcurrent state) the sense voltage needs to be above 20mV?

    In my understanding the sense voltage needs to be in a workable range just in case the current reaches the defined overcurrent limit. If the current is far from the overcurrent limit I would expect no problems since the sense voltage is anyway that small that it is not detectable. And if the sense voltage is not detectable the overcurrent protection should not be active...or am I wrong?

  • Hi Raphael,

    Note that the CS- voltage is set by resistor Rset and 10.8uA current sourced from CS- pin. This provides a voltage above VOUT at CS- whereby the voltage on CS+ must exceed this to trip the current limit comparator.

    This CS- voltage setpoint (determined by Rset) is too low in your design (243ohms x 10.8uA = 2.6mV). Note that current limit comparator offset voltage is specified as +/-5mV. Perhaps you can increase Rset to test this.

    Regards,

    Tim

  • Hi Tim,

    According to the datasheet I have here, the CS- current is 9.9uA and the comparator offset is +/-3.5mV, but this shouldn't be a problem.

    I changed Rset to 1kR (and Rcs as well since both should be identical) which lead, as expected, to a voltage of 10mV. But this didn't help as well. The inductor (or the regulator) sounds like arcing, quite fast but not periodically. It seems that the regulator tries to start but anything prevents him to work correctly.

    My feeling is that the problems are not caused by the current sensing, there seems something wrong somwhere else.


    Is it maybe possible to shortcircuit the two CS pins to disable the overcurrent protection? So I could test, if this feature is causing the Problem.

    Furthermore I changed some components of the compensation network since I noticed that my smoothing capacitors at the end made it necessary to adapt the compensation network. But it didn't help much, now the arcing noise disappeared, but the switching regulator just tries to start once upon putting UVLO/EN high. After that the output rail as well as the PGOOD output collapses nearly immediatly.

  • Hi Raphael,

    I recommned using the LM27403 quickstart calculator (available in the LM27403 product folder) to verify your design. Also, can you send me your layout? My email is tim.hegarty@ti.com.

     

    Regards,

    Tim

  • "Is it maybe possible to shortcircuit the two CS pins to disable the overcurrent protection? ". Good question. I'm facing the same question. I would like to disable the overcurrent protection. Is it possible to shortcircuit the two CS pins?
  • Unfortunately I can't give a reliable answer to this question, but in my case the problem has been solved by selecting an inductor having a higher DCR (something like 20 mR) and changing the sensing network according to the new inductor. Now the design works quite nicely.

  • thank's. My planned DCR has aboutz 15m DCR. I didn't yet test it. But i would like to disable the overcurrent protection and i'm not sure about the two CS pins....

    Andy
  • Given the offset voltage of the LM27403's current limit comparator, shorting the CS pins may not disable OCP. Increasing the resistor in series with CS- is one solution. Note the abs max voltage from CS+ to CS- is ±1V.

     

    Regards,

    Tim

  • Thank's Tim

    Given an offset current of about 5uA on CS- (D+ shorted to D-) ->add an 6K Resistor between CS- and CS+ should make about 30mV Voltage Offset. Does this sound fine?

    Andy
  • I was having the same problem This is what I assembled 

    It only got up to 100mv under no load but it was stable. When I added a  0.1ohm load it didn't regulate at all. 

    here is the Design tool exel file12-01-2015assembly.xlsx

  • Hi Harrison,

    It is generally recommneded to install those components as overcurrent protection is typically required for reliable converter opeartion.

    Regards,

    Tim