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bq78350 Cell Balancing Test

Fred P
Expert 2225 points
Other Parts Discussed in Thread: BQ78350

I want to activate the balancing FETs using the ManufacturerAccess() Cell Balance Toggle command (0x1b) (bq78350 TRM Section 16.2.12).
It requires ManufacturingStatus()[CBTEST] = 1.
That bit can be read using command 0x57 in a read-only register.  CB_TEST bit is at 0.

How can I write CB_TEST bit to 1?

In addition, do I need to only issue 0x1B command or it needs a parameter?  I feel it is only a command but what to make sure...

Cell balancing is enabled in Balancing Configuration Register.

Thanks,

Frederic

  • 0
    Expert 2225 points

    I still need help on this one.

    Thanks

  • 0 in reply to Fred P
    TI__Guru 54715 points

    The CB_TEST bit is a status bit which is set by executing the Manufacturing Access Command (MAC) 0x001B.  Note that in table 16-2 of the TRM that the 0x001B command is not available in Sealed mode, and note in the description in 16.2.12 it is intended for board test at low voltage.  If you have external FETs those may need to be tested with control of board test points at a higher voltage.  The FETs may not turn on at the low voltage, also the 0x001B command uses alternating cell patterns for the balance test.  When configured for 4 cells in any of the groups, this will result in attempting to balance adjacent cells and the external FET circuit will not work properly.

    There is no parameter needed for the cell balance test command (MAC command 0x001B).

    To read the Manufacturing Status CB_TEST bit, Send the MAC command 0x001B, then read the block command 0x57.  The status should be 2000 (or 00 20) if other bits are not set.  Alternatively you can send MAC command 0x0057 and read the block 44.  To confirm the 0x001B test state, send the MAC command 0x0059 and read the block 44.  This shows the AFE registers.   The block protocol is described in the TRM section 16.2 3rd paragraph, the first 2 bytes are the command (59 00) followed by the registers, the cell balance registers are the next 3:

    First command 001B: 59 00 15 0A 15 18 40 00 00 50 C7 19 19

    Second command 001B: 59 00 0A 15 0A 18 40 00 00 50 C7 19 19

    Third command 001B: 59 00 00 00 00 18 40 00 00 50 C7 19 19

    A reset also ends the cell balance test

  • 0 in reply to WM5295
    Expert 2225 points

    Thanks for that detailed answer. 

    I'll test that again soon.

  • 0 in reply to WM5295
    Expert 2225 points

    I had it work.  Thanks.

    The main problem I had was at using Battery Management Studio.

    I was using the "Send Cmd" function thinking it was actually sending a ManufacturerAccess command.  It did not work.

    I had to use the "Write Word" at 0x00 (ManufacturerAccess...) with the command number (1b) into the "Word"  edit box instead of into the "command" edit box.

  • 0 in reply to WM5295
    Prodigy 120 points
    Could you clarify this for me? We have an 8s configuration, with 4 cells on each block, shorting vc3-4 and vc8-9. Cell balancing is external, and we wish to test this hardware during production. However, as you mentioned, we cannot test cell 3 or cell 7 (with "cathode" connected to vc3-4 and vc8-9, respectively (during testing, the cells are simulated, of course)). How can we test this? TRM states that MAC 0x59 is R/W in the text, but not in the table, and I can't seem to be able to write to this command.
  • 0 in reply to Harald Landro
    TI__Expert 6470 points
    We have submitted the mistake in the TRM for correction in the next version. Thanks for identifying this.
    It is read only. If you cannot use the 0x001b command, then looks like you would need to implement gate control of the external fets in your production fixture.