TPS51206 Power ON/OFF sequience

KIYOSHI NARISAWA1

Expert 1510 points

Other Parts Discussed in Thread: TPS51206, TINA-TI

Dear TI

Power sequence of TPS51206 shows typical timing only.

Is there any limitation of power up and power off sequence for VDD,VLDOIN and VDDQSNS?

When hit UVLO in VDD and then recovers during supply VLDOIN and VDDQSNS voltage,

is there any problem for that?

Thank you for your cooperation.

Best Regards

K.Narisawa

over 10 years ago

0 JohnTucker over 10 years ago

TI__Guru**** 191445 points

Can you provide specific details about your timing requirements?

0 KIYOSHI NARISAWA1 over 10 years ago in reply to JohnTucker

Expert 1510 points

Hi John-san,

I'm checking by TINA-TI tool now, and can get EVM so then will check on EVM next.

Thank you and best regards

K.Narisawa

0 Arm Wang over 10 years ago

TI__Prodigy 110 points

Hello Narisawa-san,
This timing sequence showed in the datasheet is for typical Notebook Computing DDR power VTT rail application.
Can you share us what is timing sequence need in your application.BR,Arm

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TPS51206 Power ON/OFF sequience