TPS7A7100 Input capacitor

T Kishi

Hello

My customer has a quesition.Please teach me about it.

It is written in the datasheet."The best guideline is to use a capacitor of up to 1 µF with well-designed wire connections (PCB layout) to the
upstream supply."

But,In the circuit of EVMdatasheet is Input capacitor =10uf.

Which is correct "1 µF" and "10uF" ?

Regards

T Kishi

over 10 years ago

0 Ryan Eslinger over 10 years ago

TI__Guru 55940 points

Hi T Kishi,

The idea here is to minimize unwanted LC resonance in combination with input wire inductance. In the case that it is difficult to optimize the input line, you can use a large tantalum capacitor in combination with a ceramic capacitor. The EVM was designed so that it can be used for evaluation in a wide variety of applications and may not be optimized for your specific application.

Very Respectfully,
Ryan

0 T Kishi over 10 years ago in reply to Ryan Eslinger

Genius 4425 points

Hi RyanThank you for reply.
I understand the reason for the difference in the datasheet and EVM circuit.
That is,Optimized if possible the input line,input capacitor is that OK with 1uF?
Regards T kishi

0 Ryan Eslinger over 10 years ago in reply to T Kishi

TI__Guru 55940 points

Hi T Kishi,

Yes, it is possible to use a 1uF input capacitor.

Very Respectfully,
Ryan

0 T Kishi over 10 years ago in reply to Ryan Eslinger

Genius 4425 points

Hi RyanThank you! Question become clear.Best RegardsT Kishi

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TPS7A7100 Input capacitor