The regulators in question are the TPS54526 and the TPS54325. The area of concern is the minimum on time required by the internal FET. In the datasheet there is a parameter listed as "On time" or Ton (See SLVSB84C Section 7.6, page 6) and it specifies 155ns for the TPS54526 and 145ns for the TPS54325. What is this value trying to say? Is it a minimum on time requirement for the internal FET?
If that is the case then when Vin is 12V and Vout is 1.05V (according to the test conditions listed in the datasheet) the duty cycle for on time vs off time would be around 1.05V/12V or 8.75%. Assuming a switching frequency of around 650KHz with a period of 1.54us, that would translate to a on time of about 135ns and an off time of around 1.405us. The 135ns On time is below the 155ns specified in the datasheet. We have not seen any issues with our current designs but Is this something that we should be concerned with or are we interpreting that parameter incorrectly?
Is there a minimum on time that is required by the internal FET?
I am also looking to use the TPS54525 on a new design that I am working on where I have a 12V input and I need 1.2V output so my duty cycle would be around 10%.