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LM5025A / current limit

Guru 29720 points
Other Parts Discussed in Thread: LM5025A

Hi Team,

I would like to ask about the current limit of LM5025A.
I found the following description in datasheet page.12.
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Current Limit
The LM5025A contains two modes of over-current protection. If the sense voltage at the CS1 input exceeds 0.5V
the present power cycle is terminated (cycle-by-cycle current limit).
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So, I have two questions.

1)
I would like to confirm the meaning of "the power cycle".
Does it mean the enable period of OUT_A?

2)
If CS1 input exceeds 0.5V during main FET is OFF(OUT_A is Low), is the next power cycle terminated?

Best Regards,
Yaita / Japan disty

  • The pin description for CS1 in the LM5025A data sheet says the PWMIC goes into to a "Cycle by Cycle" current limiting mode. This means that the main switch is disabled whenever the current sense voltage exceeds 0.5V and a clock cycle appears at the rs flip flop. A large, short duration of current, or current spike, is allowed each cycle as long as the overload condition exists and the sense voltage exceeds 0.5 Vs. Usually the current spike lasts several nano seconds and the time period between each current spike is in microseconds. This may not be enough protection to prevent the main MOSFET from failing from a hard, or long duration short circuit. Therefore, there is another current sense pin, CS2, that is used. When the current threshold on this pin is exceeded, the PWMIC resets the soft start. This action prevents the PWMIC gate drive from turning on the main MOSFET for many clock cycles -until the soft threshold is reached and steady state operation resumes. Because there is a much longer time period between current spikes, there is less stress on the main MOSFET. The two pins can be used together so that the MOSFET is protected against both transient overloads and hard shorts.