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TPS65261 Gain/Phase Margin Improvement

Other Parts Discussed in Thread: TPS65261

Hi,

 

Customer of mine intend to use TPS65261 for AV Receiver application and generated the loop response using WEBENCH based on following condition (see attachment):

Vin = 11V ~ 17V (rated at 14V).TPS65261_Report.pdf

Vo,Io =

1) 5.2V,3A 

2) 4.5V,2A 

3) 2V,2A

 

He then found that gain phase margin needs improvement for all channels. It is because the gain/phase margin will become completely out of spec when aging in low temp condition, and might cause DCDC IC shutdown due to reliability and responsibility issue.

 Could you advise how to tune the compensator value to have the gain/phase margin as below:

Phase margin = 50 ~ 80 degree, Gain margin = 20 ~ 40 dB.

Thanks!

  • Eng Lih Khaw,

    I am supporting TPS65261 as system/application engineer.

    from the BODE PLOT, the phase margin can meet customer's request. Only the gain margin is smaller than 20db.

    In order to increase gain margin, changing as below:

    1. Cout increase to 44uf (or 66uf, three 22uf parallel)from 22uf

    2. increase Ccomp_ch1/2 to 6.8nf, Ccomp_ch3 to 5.6nf

    Jason Wang