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TPS65185 VGNEG is extremely lower than expected

Other Parts Discussed in Thread: TPS65185

Hello,

I've implemented a TPS 65185 for driving an e-ink display. I've planned to achieve -32v on VGNEG using 620K and 20K resistors.

I expect this VGNEG to be a solid -32V and yet on all our boards the actual voltage is -39v (with & without an actual display attached).  I've double checked the resistors (R40/R41) values and variance, but still the expected value supposed to be around -32v.
All other power rails have valid values.
Any idea what have gone wrong?
 
 
Thanks in advance for your help!
 
 
Please see the attached schematics.
 
  • Hi, 

    First off, I can see you're trying to build a tripler here. Attached is redrawn version of your schemaic. 

    Here are problems I see.

    1.  If you intend to configure a tripler, you need to short either D2 or D3.

    2. Bottom plates of Cfly1 and Cfly2 should be driven by clocks out of phase to arrive at a tripler. With both caps driven by identical clock you do not achieve what you want. You could put together external workaround to create an inverted clock out of VEE_DRV, but remeber VEE_DRV transitions between 0V to VN.

    Let me know if you still have more questions.TPS65185.pdf

  • Hello analo9ru,

    Thank you for your reply and suggested solution. Sorry it took me some time to test it.

    After testing your suggested solution and shortening D2, it seems that the device TPS65185 got to a bad state and is not working anymore (driving ~8v on all rails). Removing the short over D2 did not recover the system.

    I am not sure what is the issue here, clearly I don't see any reason why it actually happened.

    Does it make sense to you?

    What do you mean by 'tripler'?

    Thanks,

    Gal

  • Did you separate C82 and C83 and drive them with out-of-phase clocks?

    What I mean by tripler is that the charge pump in this part is designed to work as a regulated doubler and that your configuration is tripler, which requires another clock.