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UCD9222 VID's during Power Up

Mads Holmer
Prodigy 50 points
Other Parts Discussed in Thread: UCD9222, UCD7242, TMDSEVM6657

I have used the UCD9222 and UCD7242 in a design like the TI Eval TMDSEVM6657.

During the verification of the power supplies, i have found the following:

The POR (Power On Reset) time for the UCD9222 is app. 16 mS. The time it takes from power applied to be ready to generate outputs ?

During that time the VID1A (input pin) is clamped to ground ?  This only applies to VID1A not the other VID pins ?

I can't find anything on this behavior in the datasheets, somebody having same experience ?

Thanks in advance.

Best Regards

Mads 

  • 0
    TI__Genius 9845 points
    Hi Mads,

    What you observed are expected behavior.

    Thanks,
    Zhiyuan
  • 0 in reply to Zhiyuan Hu
    Prodigy 50 points

    Hi Zhiyuan,

    Thank you for the fast reply.

    I think the information about the VID_A clamp to ground during POR are very relevant. I don't know how familiar you are with the TMDSEVM6657, but the VID signals are level converted from 1V8 to 3V3 using a 74AVC4T245.

    I my design the 74AVC4T245 becomes active at the same time as UCD9222 starts the POR cycle (15-16mS). This means that 74AVC4T245 driving VID_A high, and UCD9222 clamp to ground - the current is only limited by the sourcing capability of the 74AVC4T245.

    Now I know I think we will add series resistors in the next spin of the PCB layout or control the #OE by external logic.

    Best Regards

    Mads Holmer

  • 0 in reply to Mads Holmer
    TI__Genius 9845 points
    Hi Mads,

    Thank you very much for this information.

    Regards,
    Zhiyuan