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bq78PL114S12: Can EFCI_C and EFCI_D pins be pulled up by LDO1?

Other Parts Discussed in Thread: BQ78PL114

I have an application that needs to trigger the EFCI_C and EFCI_D pins via a chip with open-drain FET ouputs. The FETs are active-low so I need to pull EFCI_C and EFCI_D high to allow detection of the FET's pulling the pins low.

Can I pull up EFCI_C and EFCI_D to the 2.5V level of LDO1 and have it recognized by the bq78PL114 as a HIGH input? There's nothing in the datasheet to indicate what the levels are for HIGH and LOW for those pins but the specs for the SMBus pins shows, I believe, that anything over 2.1V is interpreted as HIGH.

If I can pull up successfully to 2.5V, what's the max pullup resistor value I can use? That is, how much current do those pins need to be pulled up?

Thanks!