LM25066A/Relations of POR and PGD

Tsukui Yusuke

Guru 21930 points

Other Parts Discussed in Thread: LM25066A

Hi,

Customer looking to LM25066A.
Could you tell me about at POR PGD status of PGD when POA.
Is PGD fixed to low when the POR has been determined?

Best Regards,
Yusuke/Japan Disty

over 10 years ago

0 Alex Triano over 10 years ago

TI__Genius 12621 points

Hi Yusuke-san,

PGD will likely be fixed to low when POR is reached because both the FB network and UVLO will likely be below their threshold values.

The block diagram on page 13 shows what determines whether PGD will be high or not:
www.ti.com/.../lm25066a.pdf

Essentially the FB and UV pins must be above ~1.16V and the OV pin must be below ~1.16V.

Thanks!
Alex

0 Tsukui Yusuke over 10 years ago in reply to Alex Triano

Guru 21930 points

Hi Alex,

Thank you for your support.
Would you help to check customer circuit diagram of LM25066A?
Nice to hear from you.
My e-mail address is:
tsukui-y@clv.macnica.co.jp

Best Regards,
Yusuke/Japan Disty

0 Tsukui Yusuke over 10 years ago in reply to Alex Triano

Guru 21930 points

Hi Alex,

Thank you for your support.
Would you help to check customer circuit diagram of LM25066A?
Nice to hear from you.
My e-mail address is:
tsukui-y@clv.macnica.co.jp

Thanks
Best Regards,

0 Alex Triano over 10 years ago in reply to Tsukui Yusuke

TI__Genius 12621 points

Hi Yusuke-san,

We have the LM25066A design tool which we use to both create new designs or review existing designs.

It is the first download link on this page:

Simply enter system parameters such as Vin range, output cap range, what was chosen as Rpwr, Ctimer, and more. The tool will then calculate whether or not the design has margin.

Please let me know if you or the customer has trouble using the tool.

Thanks!

Alex

Power management

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LM25066A/Relations of POR and PGD