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TPS2032D / Reverse current

Hi All,

I confirmed the block diagram but it has no body diode on internal power FET. I believe that actually it has body diode and the reverse current will be flowed from OUT to IN if the bias will be applied on OUT with no input. Is my understanding correct?

I understand the absolute maximum rating of OUT is VI(IN) + 0.3V, so the bias higher than it is cause of damage.

Best Regards,

Sonoki / Japan Disty

  • Hello Sanoki,

    The FET graphic in the block diagram has the substrate grounded and this is intended to represent a switch without any body diode. Or, in other words a switch which can block current in both directions when the enable pin is not asserted. Of course, this is a simple graphic representation only and the actual implementation is much more complex.

  • Hi Eric,

    Thank you for your comment. I understand that this can prevent reverse current. But it's not acceptable to add bias higher than VI(IN) + 0.3V at any rate, right?

    Best Regards,
    Sonoki
  • Ho Sonoki,

    Yes, we have this restriction so that the ESD protection diodes are not activated. For example, if Vi = Vi-maximum (6V) then Vo-maximum is Vi-maximum + 0.3 or 6.3V. If Vi = 5V, then Vo-maximum = 5.3V.