• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 63 subscribers
  • Views 668 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Will BQ76925 i2c bus automatically recover from hang up state?

Alex Yu
Prodigy 40 points
Other Parts Discussed in Thread: BQ76925

If the Microcontroller (as i2c master) restart by watchdog, the proceeding i2c communication may stay in some uncertain sate.

For example, if BQ76925 (as i2c slave) is polling down the SDA line at this time, then when Microcontroller has restarted, it will find i2c bus busy.

So my question is, if BQ76925 will automatically recover from such i2c bus hang up situation? Like it has some timeout mechanism etc.?

  • 0
    TI__Guru 54715 points

    No, fSCL can go to 0 Hz or DC. The part will not timeout but will wait for a clock.  The host should implement the standard I2C recovery mechanism of sending clocks until the slave releases the bus, I think the recommendation is 8 or 9 clocks, please check the specification.

  • 0 in reply to WM5295
    Prodigy 40 points
    Thanks a lot!

    This is what I found in the document "DesignCon 2003 TecForum I2C Bus Overview.pdf":
    "
    Bus recovery sequence is done as following:
    1-Send 9 clock pulses on SCL line
    2-Ask the master to keep SDA High until the “Slave-Transmitter” releases the SDA line to perform the ACK operation
    3-Keeping SDA High during the ACK means that the “Master-Receiver” does not acknowledge the previous byte receive
    4-The “Slave-Transmitter” then goes in an idle state
    5-The master then sends a STOP command initializing completely the bus
    "