This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
In a load supply using P-MOS(following AND9093/D), the input to source is 10V. We found unfortunately that the MOSFET (TI CSD25310Q2) we chose and soldered has only 8V maximum gate-source voltage. Although there are voltage dividers consisting of R1 and R2, we are not sure upon the sudden turning on of NMOS, whether VGS could temporarily reach 10V, and whether the P-MOSFET Q1 could stand it.
Questions:
Matt
Matt,
We do not recommend driving above the absolute maximum Vgs of the FET as this can severely degrade the FET.
We do however, offer the CSD25402Q3A does offer up to 12V Vgs so if you are driving at 10, you should be ok. Unfortunately, we do not offer anything higher than this.
I'll have to talk to someone from our applications team about your second question. Can I ask what project this is for?
Brett,
Thanks for response.
Could we add a Zener diode at the place of (or above, below) R_2 to block the excess voltage? Has there be precedents of the Zener configuration?
Also, if we are trying to switch Q_1 with a square wave of 20μs period, would the Zener solution work to the speed?
Matt