I have a Query on TI article on Improving Power Supply Efficiency –The Global Perspective.
- The equation 4 on page 9, the switching losses in Drain capacitance VDS (the voltage change across CDS) is mentioned. That Vds is the RMS value or peak value (As in my system at the Drain there is Full wave rectified voltage waveform is there, So RMS and peak value are different)
- In Equation 5 on page 9, Switching Overlap
P = 0.5×VDS × I ON× t TR× fSW
What is t TR mentioned here?
VDS is RMS value or Peak value?
I ON is RMS current that is flowing through the MOSFET?
I am attaching the Document along with this mail for your reference.