Hi,
I have a board where LMZ20502 is fed with 5 volt input, and should give 1.8 volts output.
The enable pin is controlled by an FPGA, which floats it's output during FPGA configuration download. The enable pin is pulled down with 1k resistor.
During the time FPGA is floating the enable pin, the measured voltage is 500 mV, which is higher Ven-Vil (low level input voltage, 400 mV).
Thus it seems that the input current is around 500 uA. OTH, the IQ_off (shutdown quescent current when EN = 0V) is specified 2.4 uA max, which seems contradictory for me.
Is the input current really as high as 500 uA, or could I have another source of error?
BR, -Topi
