PROBLEM
I'm running an AM3356 ARM with TPS65217A PMIC connected for power and startup signals in our preproduction prototypes. The PMIC would not start up.
3.8V was applied to the PMIC, a 1 sec. PB signal was generated to the PB input to the PMIC, and the only output from the PMIC was the 1.8V VRTC LDO for 5 seconds. No 1.8V, 3.3V, or 1.1V was seen from the 3 switching regulators. The PMIC_POWER_EN (w/VRTC pullup) from AM3356 never went high.
The PMIC finally started working when a “kludge” work around was applied.
DESCRIPTION OF CIRCUITRY
- TPS65217A is run as a 5-V Only Operation with power supplied through BAT PIN (AC and USB pins grounded).
- 3.8V applied as Vin to BAT PIN, VIN_DCDCx, and VINLDO pins.
NOTE:
- AM3356 CAP_VDD_RTC pin mistakenly connected to VDD_CORE pwr supply instead of 1uF cap to VSS
- AM3356 RTC_KALDO_ENn pin mistakenly connected to VRTC instead of VSS
THE "KLUDGE FIX"
Was able to get working by disconnecting PWR_EN on TPS65217 from AM3356 PMIC_POWER_EN and connecting TPS65217 PWR_EN to PB_IN.
PWR_EN follows PB_IN so both PMIC pins are high when power is applied, and both go low when the PB signal goes low.
PWR_EN is low before the 50mS debounce time for PB_IN expires, so by the time the TPS65217A recognizes PB_IN is low, PWR_EN is seen as low.
Then PWR_EN is seen going high when PB_IN signal goes high 1 second later, starting PMIC VDCDCx outputs.
QUESTION
- Our product operation is simple.
- We come on and run at full power (no sleep mode or low power mode).
- We use the real time clock for time and date for the Linux system, but don’t back the clock up with a battery. The RTC is needed just for Linux for some applications to know the date (a server resets the time if powe ris cycled)
- We turn off power by unplugging the board - no special power down.
Is this kludge fix OK as far as the AM3356 powering up in the correct sequence and being initialize alright or do I need to go back and correct the CAP_VDD_RTC and RTC_LAKDO_ENn connections on the AM3356?
Will this fix impede the operation of the Real Time Clock?
The fix lets us go ahead with software and FPGA development, but I don't want surprises right before product release.