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TMS320F2802 supports parallel operation?(TMS320F2802가 PSFB parallel operation을 지원합니까?)

Other Parts Discussed in Thread: TMS320F2802, UCC28950

I am the Son and living in the South Korea.
It is being designed a 1U size PSFB.
The question, is parallel operation UCC228950 to TMS320F2802 and Slave to master
Possible or I will inquire whether.

;저는 한국에 사는 손병삼이라고합니다.

1U 크기에 PSFB를 설계하고 있습니다.

질문 사항으로는 TMS320F2802를 주로 UCC228950을 부로 해서 병렬운전이 가능한지 문의 드립니다.

  • Richard

    Can you please explain your request more clearly?

    Are you asking if the UCC28950 controller can be synchronised as a slave to a master clock, where the master clock is generated by a TMS320F2802?

    Or are you asking if two devices UCC28950 can be configured as master/slave?

    Thanks,
    Bernard
  • Hello bernard.

    The situation is as follows.

    1. Topology : Phase shift full bridge

    2. Master part :  TMS320F2802

    3. Slave part : UCC28950

    Is it possible?

  • Are you asking if the UCC28950 controller can be synchronised as a slave to a master clock, where the master clock is generated by a TMS320F2802?
    : Yes,
  • Richard,

    On the UCC28950 product page on www.ti.com, there is a very good and thorough app note which explains all the details and requirement of synchronising multiple UCC28950 devices:

    www.ti.com/.../slua609

    From this document and from the datasheet, you need to put the UCC28950 into slave mode by connecting the RT resistor from RT pin to GND and placing an 825 k-ohm resistor from SS pin to GND (i.e. in parallel with SS cap). The RT value is chosen to set the free-running frequency at least 30 % less than the required sync frequency, i.e. the sync freq must be at least 40% higher than the free-running freq.

    You can then generate a sync square-wave from the TMS320 using a timer and digital output that can be connected to the SYNC pin of the UCC28950. The UCC28950 will synchronise to the falling edge at the SYNC pin, plus some internal prop delay. The sync signal must be at least 2.8 V amplitude, and the pulse-width must be at least 300 ns (it does not need to be 50% duty cycle).

    Please refer to the app note and datasheet for more detail.

    I hope this helps to answer your question.

    Thanks,
    Bernard