This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65217 question for no USB power and no Battery pack

Other Parts Discussed in Thread: TPS65217

 Hello guys,

 Our customer and I are facing to the following problem with TPS65217 for new product design.

  Problem: SYS is not power up when nRESET level is changed from low to high.

  Conditions: 1. USB=0V.

                   2. AC=4.6V or 5.0V.

                   3. No Battery. Battery related terminal connections are same as the left diagram of Figure 56

                       in TPS65217 datasheet (SLVSB64G)   

                      (BAT terminals are connected to BAT_SENSE only. TS terminal is open.)

                   4. When AC is powered up, SYS and LDO1 are powered up.

                       After that, our customer set nRESET to low level. Then the SYS is shut down.

                       Next, the customer set nRESET to high level again to wake SYS and LDO1. But then SYS and LDO1

                       was not opowered up. This is the customer problem at both condition, AC=4.6V and 5.0V.

                   5. The customer added 4.7kohm resistor between VBAT-GND for current leaking. Then SYS and LDO1 were

                       powered up  when AC is 5.0V. But when AC is 4.6V, SYS and LDO1 were not powered up

   Questions: 1. Why SYS and LDO1 are not powered up when nRESET level is changed from L to H with AC=4.6V

                          and 5.0V without 4.7kohm resistor?

                     2. Why SYS and LDO1 are powered up when nRESET level is changed from L to H with AC=5.0V with

                         4.7kohm resistor case only?

 Your comment or advice would be appreciated.

 Thank you and best regards,

 Kazuya Nakai.

 

                      

                      

               

        

   

  • Kazuya,

    A few questions:

    How is the customer pulling nRESET low, with a push button?

    Does PWR_EN get pulled high within 5s of coming out of reset, or is it always held high throughout the reset sequence?

    Have you been able to do the same on the EVM (if you have one)?

    Can you send me the schematic, so I can check for any errors?

    Janice
  • Hello Janice,

    How is the customer pulling nRESET low, with a push button?
    --> Yes, nRESET is pulled low by a mechanical push switch.

    Does PWR_EN get pulled high within 5s of coming out of reset,
    or is it always held high throughout the reset sequence?

    --> PWR_EN goes high from low within 5sec by MCU after SYS and LDO1 powered up by nRESET.

    We ordered TPS65217C_EVM to check the behavior but we have not received it yet.

    Can you send me the schematic, so I can check for any errors?
    --> Sorry. We asked them to give us the schematis but the customer didn't disclose it.

    The customer wonder if the behavior would be related to VBAT condition.

    Do you think the power up sequence is affected by VBAT condition?

    Thank you and best regards,
    Kazuya Nakai.
  • Tie the AC and BATT nodes together, and see if you still have this issue. Remove the resistor from the batt terminal.