Dear all.
If VDD will be less than 2.7V(EN=High), which state will output be?
Regards,
PAN-M
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Dear all.
If VDD will be less than 2.7V(EN=High), which state will output be?
Regards,
PAN-M
Hi,
I tested one unit on the bench. Vcc is tied to EN pin as Vcc is sweeped. From 0V to 0.7V Vcc, output flags will follow Vcc. After Vcc > 0.7V, output flags will be low. Once Vcc reaches around 1.6V to 1.8V, output flags will go high.