Other Parts Discussed in Thread: UCC28950
Hi,
Could you tell me about UCC28950 phase shift.
There is the following description in the data sheet page 26.
When I think from the master side,
The pattern that slave side becomes 180˚ delayed versus Master’s CLK or
90˚ delayed versus output switching pulses of Master.
Is there a way to fix this phase to one?
Customers want to fix the phase either.
Could you tell me if such as a circuit example.
◇Datasheet page 26
The UCC28950 allows flexible configuration of converters operating in synchronized mode by connecting all
SYNC pins together and by configuration of the controllers as master and/or slaves. The controller configured as
Master (resistor between RT and VREF) provides synchronization pulses at the SYNC pin with the frequency
equal to 2X the converter frequency FSW(nom) and 0.5 duty cycle. The controller configured as a Slave (resistor
between RT and GND and 825-kΩ resistor between SS_EN pin to GND) does not generate the synchronization
pulses. The Slave controller synchronizes its own clock to the falling edge of synchronization signal thus
operating 90° phase shifted versus the master converter’s frequency FSW(nom). Because the Slave is
synchronized to the falling edge of the SYNC pulses, the slave operates at 180˚ delayed versus Master’s CLK or
90˚ delayed versus output switching pulses of Master.
Best Regards,
Yusuke/Japan Disty