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LP8543 configuration problem

Other Parts Discussed in Thread: LP8543

I have some trouble configuring the LP8543.
I have a backlight with 4 strings. The strings are connected to OUT1 - OUT4, OUT5 - OUT7 are left unconnected. When I set the PWM signal to high, the backlight turns on. The voltage is boosted to around 38V and OUT1 - OUT4 are around 10V, so the chip becomes hot very quickly if I increase the current. So I tried to tell the chip to only use 4 strings and set the OUTPUT_CONF[1:0] to "00".
I wrote 0x01 to location 0xB2 to change the output configuration. Then I wrote 0x09 and then 0x00 to the EEPROM_control at location 0x72 to push the change to the EEPROM registers. When I now read location 0xB2 it shows 0x01 as expected. Now I set PWM signal to high, backlight turns on but the voltages are as before. When I disable PWM and read location 0xB2 it know shows 0x21, so OUTPUT_CONF[1:0] is back to "10" (OUT1 - OUT6 active). The same "reset" occures when I set location 0x01 (Config1) to 0x01 and back to 0x00 instead of switching PWM on and off. Other bits seem to reset as well, for instance EN_STANDALONE.

What am I doing wrong? How can I change the OUTPUT_CONF to only use OUT1 - OUT4?

PS: I noticed, when I disable the chip (EN-Pin=0) and enable it again, the EEPROM is not ready (EE_READY=0) and the values in the EEPROM memeory map are wrong. They become 'rigth' (and EE_READY becomes '1') after is switched PWM on and off or set BL_CTL to '1' and back to '0'. Is this intended behaviour?

  • Hello,

    To be able to change the EEPROM content, the EE_READY bit must be high. The backlight must be disabled to be able to change the content. So when you are burning the EEPROM, make sure the BL_CLT = 0 and PWM pin is low. Chip has to be enabled before accessing EEPROM, this can be done by writing NSTBY bit high in register 0x72.

    EEPROM content is read during the startup. By setting the EN high only enables the LDO and to go through the full startup sequence you have to set BL_CTL = 1 or external PWM high. Or alternatively set the NSTBY bit high in register 0x72 Before you have done that the register values are random.

    EEPROM burn sequence

    Address Data Access Function

    PWM pin must be low to be able to access EEPROM.

    72H 10H Write Enables chip and boost converter, PWM calculator is disabled

    72H 90H Read

    Check that EEPROM_READY bit is 1. If not, either PWM pin is high or PWM calculator is enabled. These must be disabled before EEPROM can be accessed.

    A0H – BFH User defined Write Write date to EEPROM SRAM.

    72H 14H Write Erase EEPROM.

    Wait for 100 ms

    72H 10H Write Reset EEPROM controlling bits

    72H 12H Write Burn EEPROM

    Wait for 100 ms

    72H 10H Write Reset EEPROM controlling bits

    Reset chip by setting EN pin low and then high again

    72H 10H Write Enables chip and boost converter, PWM calculator is disabled. EEPROM data is

    loaded to from NVM SRAM during startup.

    A0H – BFH User defined Read Read data from EEPROM. Data should be the same as written earlier.

     

    Hope this helps.

     

    Thanks.

    Best Regards,

    Tomi Koskela

     

     

     

  • Thanks for your reply!
    The problem was not setting the NSTBY bit to '1'. Unfortunately the NSTBY bit is (among others) not described in the datasheet. I think this document needs some rework...
    Everything is working now with the above sequence. Thanks also for the clarification of the startup process.

    One tip to other users: To have temporary changes on the register based settings, one needs to leave the NSTBY bit at '1' when switching PWM on.