Problem with LM5030

Hello Marko

If VFB is at 0V, then COMP should be saturated high - probably close to 5V. If COMP is tied to GND then I would check to see if there is a short circuit between COMP and GND. Have a close look - . If you find one - that's good, if not then double check the other tracks on the PCB and double check that the IC is being placed in the correct orientation (I've made that mistake more than once!)

Once you get COMP 'freed' then I would suggest the following diagnostics to get a feel for the operation of the circuits around the controller -

Disconnect the OUT1 and OUT2 pins from the MOSFET gates - tie the gates to the source with 10k resistors - this is to keep them in the OFF state and to avoid damage to the power train components until you have some confidence in the controller circuitry.

Now - the aim is to get the controller to output some pulses at OUT1 and OUT2

First, Vin must be in the range between 14 and 100V - you mention setting it to 24V - that would be ok

If the SS ramps to 5V then this means that the chip is 'alive'

Tie the CS input to 0V - it should be at this voltage in any case if you have disconnected the MOSFET gates.

If VFB is at 0V, then COMP should be high and the system should run at Dmax with OUT1 and OUT2 in antiphase. If you increase VFB beyond 1.25V COMP should go low and the duty cycle should go to zero.

Once you have this basic level of functionality - you should reconnect the power MOSFETs and the system should run.

Let me know if you have any further questions.

Regards

Colin

Ok, after close inspection I found out that I switched the silk screen for the resistor for Vfb and for the capacitor for COMP.

I have preformed some tests on the power supply and I think something is still not ok. The push pull converter drives 1 transformer that produces 2 isolated outputs (as in app nots - same transformer), with a 2K load on each output. The whole circuit draws 110mA and I get 48 V of ringing on the waveform from drain to gnd. Is this somewhat ok? The transistors (CSD19533) are getting a bit warm. Should I populate the RC circuit from the drain to gnd and if so what how should I pick the value of the R and C. The frequency of oscillations is 9,25 MHz. 

Sorry if this is a basic question, I'm still a bit green.

Best regards,
Marko

Hi Marko
You are not the first, nor the last to get caught out by a misplaced component. Anyhow, it's good that you are making progress.

A certain amount of ringing on the drain source waveform is almost unavoidable. It can appear worse than it is if you have a long ground lead on your 'scope probe and for more accurate results you might try using the 'tip and barrel' method - Fig 3 in the document at www.ti.com/.../sluu266.pdf shows what I mean.

Having said that - the next most likely reason for the high ringing amplitude is that there is a lot of stray inductance in the PCB pattern. Energy in this inductance has to go somewhere when the switch is turned off and it normally resonates with stray capacitance - this would be reasonably consistent with a 9.25MHz frequency. Ideally one would relayout the PCB to reduce this inductance because it represents wasted energy and will reduce the system efficiency. As an interim step you can add an RC snubber to damp the oscillation. How much C ? Ideally you would like to know the values of L and C that are resonating - One way to do this is to deliberately add some capacitance from drain to source, Cadd. This will alter the resonant frequency. You now know two resonant frequencies. Subtract the two resonant periods to get the root of the L and Cadd, you know Cadd, you can calculate L. Once you know L, you can then calculate the original stray capacitance that is giving the 9.25MHz frequency.
Now, how much capacitance in the RC snubber ? the answer is 'as little as possible'. I would start with a capacitor the same value as the stray capacitance you calculate earlier. Adding this will reduce the resonant frequency by a factor of SQRT2. Calculate the impedance of the inductor at this resonance (or the impedance of the capacitor - they will be the same magnitude). This gives you the ball part resistor value you need for damping. (actually - optimum damping is either half this value of twice this value depending on whether the system is parallel resonant or series resonant, but for out purposes it doesn't matter - yet). Now - add in the RC snubber and start experimenting. This is the usual approach, theory gets you into the ball park - experiment lets you settle on a good compromise. Generally, changing the resistor by factors of 2, halving, doubling etc is a good approach -
Ideally you should look for optimum damping -see en.wikipedia.org/.../Damping and look at the plot where zeta = 0.5.
There is a tradeoff here - adding capacitance to the switched node increases losses. Adding an RC snubber will increase these losses. You just need to find a happy compromise. - this is why fixing the PCB layout is the best initial approach.

Transistors getting warm may or may not be an issue - Do you have an expected temperature rise based on the current through them plus expected switching losses. The heatsinking arrangements may need to be improved. Finally, how hot is hot - anything less than 90C case temperature is unlikely to hurt them.

Send me the layout and schematic and I will try to have a look at it over the next few days.

Regards
Colin

I have made a screen shot of the 2 layer board (attached). The schematic is the same as in the application note (part also attached). When I measure I use the spring clip on the scope probe (probe tip on the vias on the thermal pads and the spring lead in the gnd via marked TP2).      

 Attachment.rar

I have tried adding a jumper wire from the gnd pad  of R105 (current shunt) to the gnd of capacitor C308 in hopes to reduce the ringing with 0 results. I was planing to add 2 sets of  vias that would connect to and from the bottom ground plain near the current shunt and the gnd leads of the capacitor. But the thing is that  when I send out the PCB files to a couple local manufacturers to get price and delivery time,  there was a mix up and one sent me a pack of boards instead of a price estimate so I have a pack of boards that are an old version with some mistakes. 

For now I will try to use a snubber. Is there any other way to fix the existing boards to reduce the ringing. If you have any comments about the power layout I would be happy to hear them. One of the things to fix is the size of the thermal copper pour (or is the heating caused by oscillations?) I have not yet loaded the output of the power supply so I don't know how hot they will get under full load, but now I can still kinda keep my finger on the fets, but I would like to run them cooler. 

Best regards, 

Marko 

I have done the calculations you suggested and I got the following results:
foriginal = 9.259 MHz
fcadd = 6.49 MHz
Cadd = 1 nF (I have added 2 1nF capacitors - 1 on each mossfet drain)(I have also tested with only 1 capacitor and the f is then 6.45Mhz - so the same)

I calculated
L = 2.318uH
Coriginal = 127 pF


Then I added 100 pF and I got the f of 8.62 MHz. Now this is no where the SQRT2 difference. Turns out that a 9.259 and 6.49 is 1.4266 so basicly SQRT2 (1.414).

I calculated
Xl(3,318uH@8.62)= 100 ohm
Xl(3,318uH@6.49)= 75 ohm

So I tried (A snubber on both drains)
No snubber------------47V
R=0 & C=1nF-----------42V
R=75&C=1nF----------39,3V
R=100&C=1nF---------40V
R=100&C=100pF------45V

What kind of overshoot is common? How big are stray inductance and stray capacitance usually in good designs?