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UCC28180 open-short test

Other Parts Discussed in Thread: UCC28180

Hello,

Do you have a result of open-short test at UCC28180.

My customer request.

(Details test progaram)

Pin to Pin short test.

Open Pin test.

Regards,

  • Hi Taichi

    I will find out if we have this table available, it may take a couple of days to find the answer.

    Regards

    Peter
  • Hello Taichi

    This table lists the expected behaviour of this device for all the open, short to GND, short to VCC and short to neighbour conditions. The system outcome will depend on the details of the PSU being controlled - for example we cannot predict how a PSU will behave if the power mosfet is switched at 2kHz or at 800kHz due to a fault on the FREQ pin.

    Regards

    Colin

    UCC28180 Pin Fault Expected Results
           
      Open Short to VCC Short to GND
    ICOMP No Compensation. Unstable PFC operation - possibly destructive. Damage due to exceeding Abs Max ICOMPP Protection feature: IC disabled
    ISENSE ISOP, IC disabled Damage due to exceeding Abs Max Switch stays on for maximum duty cycle, inductor current continues to rise, with only tOFF(min) to reset, fuse will blow, FET will fail, sense resistor will overheat, or inductor will saturate
    FREQ GATE runs at about 2kHz. PCL should operate to keep Duty Cycle small Damage due to exceeding Abs Max GATE runs at about 800kHz.
    VCOMP No Compensation. Unstable PFC operation - possibly destructive. Damage due to exceeding Abs Max GATE locked low, no PFC switching.
    VSENSE OLP, IC disabled Damage due to exceeding Abs Max OLP (Open Loop Protection), IC disabled
    GATE PFC stage not driven. No damage PFC MOSFET held permanently ON. Likely PSU damage  
           
    Short ICOMP to ISENSE ICOMPP Protection feature: IC disabled  
    Short ISENSE to FREQ GATE runs at about 800kHz.  
    Short VCOMP to VSENSE VCOMP will hold VSENSE at 0V at startup. This will trigger the OLP. IC Disabled.  
  • Hello, Colin-san

    Thank you so much.

    Regards,
    Taichi