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TPS659037 POWERHOLD Mode

Nathan Rabenold
Intellectual 745 points

Hi-

I have a question regarding the POWERHOLD mode of this PMIC.  Section 2.6.1 of the Design Guide implies that the POWERHOLD pin (GPIO_7) can be used as ON-OFF signal.  Due to FPGA power sequencing requirement on my board, I need to delay power-on of the PMIC until an external supply rail comes up.  I had been planning to do this through use of the POWERHOLD pin.

However, in Figure 5-23 of the PMIC datasheet, it appears that upon application of input power to the PMIC, the power-up sequence commences, regardless of the POWERHOLD pin state.  The POWERHOLD is then only used to maintain the ACTIVE state 8 seconds after the RESET-OUT signal is sent.

Based this discrepancy between the two documents, I am not clear on whether or not I can actually use the POWERHOLD input to delay PMIC startup when power is applied to the board.  What power on acknowledge mode should I be implementing if I want an external input to the PMIC to initialize start-up (rather than just application of input power)?

Thank you,

Nate

  • 0
    TI__Genius 16410 points
    Hello Nate,

    You can use POWERHOLD to gate power-on as you expect. Figure 5-23 does not show power-up after input supply, but instead it powers up after a switch-on event. Application of input power to the PMIC is not considered a switch-on event (also called "on request").

    In all cases you need an "on request" to turn on the PMIC. These are listed in table 5-8 of the datasheet. Regardless of which on request is used, the PMIC will not turn on until one of these events happens. If PWRON and RPWRON are inactive (high or floating), then you can use the POWERHOLD signal as the on request to the PMIC, meaning it will only turn on after POWERHOLD is set high. In this case, POWERHOLD is also the off request, so setting it low will shut off the PMIC.

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 380 points
    Karl

    Where POWERHOLD is being used to signal the on/off request to the PMIC, should PWRON be pulled high, or is it fine to leave this pin not connected?

    Also, can you confirm that the above holds true in a BOOT configuration where BOOT1=1?

    Thanks

    Tom
  • 0 in reply to Tom Newman
    TI__Genius 16410 points
    Tom,

    If PWRON is unused, it can be left floating because there is an internal pull-up. This is true regardless of BOOT1 setting. If PWRON is left floating or connected to VCC, it won't be used.

    Regards,
    Karl