TPS65251 SW node rating

Leo Sheftelevich

Other Parts Discussed in Thread: TPS65251Hello Chris, could you please comment why in some TI datasheets the negative SW node spike/ringing is specified with a pulse width limit (such as <10 ns) while in the same DS the positive spike above SW node abs max level is not specified at all. For instance, in the TPS65251 DS. As you certainly know, such spikes can be captured with low-inductance o-scope probes while they can exceed both SW node abs max limits, the -1V and the +20V (for TPS65251). Are they real? Can you comment whether the same ringing magnitude is seen inside the chip on the die? Would less than 10ns spike matter if it is 40V for TPS65251?
Thanks,
Leo

over 9 years ago

0 Chris Glaser over 9 years ago

TI__Guru**** 150930 points

I split this thread since you are asking about a different IC, which is supported by a different team. Here is the original thread: e2e.ti.com/.../1731700

0 Jason Wang (BSR-MV) over 9 years ago

TI__Genius 9550 points

Leo,

Good questions.

Before Low side FET on, there is dead time. Druing the dead time, the current through from the body diode which will result lower negative voltage, so need -1V to support.

if the ringing magnitude is too high, please consider the test setting up. EMI will result high spikes if you use FULL BAND for O-SCOPE.

Jason

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TPS65251 SW node rating