• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 64 subscribers
  • Views 2245 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ40Z60 SMBus to I2C Communication

Ron Paraggio
Prodigy 100 points
Other Parts Discussed in Thread: BQ40Z60, AM3354

I have the BQ40Z60 SMBus connected the a TI AM3354 ARM processor I2C interface.  There is a spec in the BQ40Z60 datasheet that indicates there is a 300ns minimum data hold time tHD(DATA) however there is no timing diagram to indicate where this data hold time referenced to/from.  SMBus 1.1 and 2.0 spec has a similar data hold time of 300ns from the negative edge of the clock to the data.  In the AM3354 datasheet and I2C spec this data hold time is 0ns. 

a)      Since data is transmitted on the negative clock edge and sampled by the receiving device on the positive clock edge, do I need to be concerned about this 300ns data hold time spec that the AM3354 may not meet when it is transmitting data?

b)      Is a timing diagram available for the BQ40Z60 SMBUS interface?

  • 0
    TI__Guru 73830 points

    The hold time spec is an general SMBus requirement. Here is the reference waveform from the SMBus spec v2.0.

  • 0 in reply to ThomasCosby
    Prodigy 100 points
    Tom,

    We did see the timing diagram in the SMBus spec. What is the 300ns data hold time tHD(DATA) in the BQ40Z60 datasheet trying to define? The term hold time is usually not used on a spec for data valid after the edge of the clock that generates the data. Data from the TI AM3354 I2C interface will be valid at the BQ40Z60 immediately after the falling edge of the clock which violates the BQ40Z60 tHD(DATA) spec.

    Which of the following is the BQ40Z60 tHD(DATA) spec. defining?

    1) The BQ40Z60 receive data from the processor cannot change within 300ns after the falling edge of the clock.
    2) The BQ40Z60 transmit data will not be valid until 300ns after the falling edge of the clock.
    3) The BQ40Z60 transmit data will be valid within 300ns after the falling edge of the clock.

    Thanks for your support

    Ron
  • 0 in reply to Ron Paraggio
    TI__Guru 73830 points

    Ron, 

    The 300ns hold time is an SMBus spec and not a spec that TI defines. I am not sure about the purpose of the hold time, since data is clocked in on the rising edge of the clock. It may have something to do with the START and STOP protocol and tolerances. Note (2) on page 191 of the AM3354 data datasheet states that, "A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL." This make is compliant with the general specs.

    The spec should mean that data should not change within 300ns of the falling edge of the clock regardless of which device is sourcing the data.

    Tom