REG101NA-3.3 output held low?

Hi Erik,

The REG101 doesn't actually have an output discharge switch, or any sort of OV detection.  I suspect that this is related to the foldback current limit.  See figure 3 in the data sheet; if the load exceeds the foldback current limit value during startup then the output will stay at GND until the load is removed.  I don't know why this would be different between your flyback and a lab supply, maybe VIN line transients are occuring on the flyback when the load is engaged that causes the input to droop.  This may then cause the output to droop, putting the output at a lower voltage after the load is engaged and more susceptible to a foldback condition.

Can you try to disconnect the load and see if the problem goes away?

Best Regards,

Mike

Mike,

I don't have a good way to disconnect the load with the circuit running. But I have been monitoring the input current.  The steady state REG101NA-3.3 input current is substantially less than 60mA, so I do not understand how it could be stuck in foldback limiting.  

Sure, the REG101 could current limit briefly during start-up, and perhaps it could even fold back for a while, but why would it remain in a foldback condition once the operating current goes below 60mA?

Are you concluding from the data sheet block diagram of the REG101 alone, that it doesn't have some sort of a low side switch which pulls the output down during fault conditions?

If you have a more detailed block diagram, or other documentation that causes you to conclude there is no OV circuit, could you send me a copy of said documentation?

The behavior I have seen is not explained by the data sheet block diagram, which is why I asked about an OV circuit.  For example, (by observation) when the REG101 is in its strange operating mode, with 4.5V at the input and the output off, I can pull up the output with 5-ish mA, and it stays stuck at 0.1-ish Volts.  There is nothing in the data sheet block diagram that indicates the output shouldn't float up to at least 3.3V under these conditions. There appears to be an internal low side switch that is not depicted in the data sheet block diagram.

Do you have a cross reference to what patents apply to the REG101?  I'm pretty sure US 6,188,212 applies.  Does US 6,201,375 apply?

Is Dave Heisley still at TI?

Thanks,

Erik

TI, where are you at with addressing these questions?  I needed an answer 2 days ago.

I have blown 2 weeks of schedule farting around with the REG101, which I consider an unmitigated disaster. This is just about the simplest circuit in my whole system.  First time I've had a LDO regulator that didn't work right out of the box, after paying careful attention to data sheet capacitance / ESR recommendations.

I now have an LT1761 installed on my engineering development board in place of the REG101, with the NR cap depopulated, and this has been working perfectly from the start, with no additional effort.

I'm tempted to replace the REG101 in this application with a LT1761, for the production configuration, and never look back.  The only reason I hesitate to do that for even a nanosecond, is that I have REG101 devices all over the place in older program applications on other existing production boards, and now I'm worried that the REG101 may represent a latent design problem on those boards.

Are you going to put me in touch with someone who understands the design of the REG101?

Thanks,

Erik Berg

Space Vector Corporation

Hello Erik,

I'm sorry about the delay.  This is an old device, the designer is no longer here.   I also see the device sink current when it is disabled - when I put a 1k resistor from VIN (5.5 V) to VOUT (of a 5.0 V device, we did not have 3.3 V devices in the lab) while the device is disabled, the output comes up to roughly 2.5 V (3 mA or so).  This is not the typical pulldown that our more recent LDOs have, they are typically ~100 Ohms.  

The age of the device makes it difficult to track down any device schematics.  I will continue to pursue with the team, unfortunately I won't be able to get any additional answers to you until tomorrow.

Best Regards,

Mike

Erik,

I've found that there is a small pulldown device on the output of REG101 that is intended to help pull the output down when there is a transient to a light-load state, improving the light-load transient response.  This device is on (sinking current) when EN is low.  However, we cannot explain why you see the output appears to be latched during startup on your system.  Can you send the schematic (or just description of CIN/COUT/LOAD) and a scope plot so we can attempt to re-create the issue here?

Best Regards,

Mike