Hello,
I'm a graduate student doing research about GaN gate drivers. I want to know slightly more details about the clamping circuit in LM5113.
Is it a zener diode or a LDO?
Thank You!
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Hi Zichao,
the clamping circuit on the LM5113 is similar to an LDO.
Regards,
Alberto
Thank you Alberto! I have another question about the low side gate driver.
On the data sheet it says the maximum VDD of LM5113 is 7 V. However, EPC's data sheet says the maximum Vgs of their GaN is 6 V.
My question is that does LM5113 have a clamping circuit for the low side VDD?
If I apply 7 V to the VDD, does the gate see 7 V directly, or it is clamped to 6 V or so?
Thanks,
Zichao
Hi Zichao,
there is not voltage clamp on the low side driver.
If you feed 7V to the LM5113 no damage will occur to it, but as soon as you turn on the low side gate the full 7V will be available. If you are driving a GaN FET rated at 6V absolute maximum you will damage it.
Regards,
Alberto