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TPS65910AA1 & TPS65910A31A1 with AM335x

Other Parts Discussed in Thread: AM3352

Hello,


This could be a old topic but I still have some questions.


We have a customized board with an AM3352 and TPS65910AA1, we have produced more than 100 units in the last two years, until now, all units worked well without any disturbance or error. The schematic and layout was reviewed by Texas team twice!! I am working on a new production of this project of 200 units to increase of the field tests confiability, and in the production phase I observed one new problem never noted before. Aproximately 27% of my production are not powering on the Sitara, looking for any production mistakes I did not found anything, the source of the problem was in the VRTC from PMIC that not started in the regular voltage 1.8V, all parts with the same problem have VRTC on 0.8V approx.

As the VRTC is the first wake-up power from PMIC startup, I powered this line with an external voltage supply and the board powered up normally and working fine, after this, I removed the external (parallel) voltage supply and the board still running well.

Looks like there is a instantaneous current that's not allowing the PMIC to start.

When searching for answers on this forum I read some topics LINK1 and LINK2. I noted there is some kind of power fail when using VRTC of PMIC to power the VDDS_RTC from Sitara. There are two tips to avoid this trouble, use an external source for VDDS_RTC of Sitara and keep VRTC unconnected with it, or use the PN TPS65910A31A1 that allow the direct connection with the VDDs_RTC on Sitara.

My questions are:

1) This problem is unstable at which point? I have 100 units of my board in field, is there any chance of these boards starts to have the same problem that I noted in production? Should I recall all units to avoid problems?

2) As is the same datasheet, is there any other difference from these two partnumbers (TPS65910A1 and TPS65910A31A1) that is not mentioned in the table 1 of SWCU083D looking to the firmware? After change VIO_REG, bits SEL to my DDR2 voltage (1V8) will work fine?

3) In my customized board I'm not using RTC from Sitara, can I remove the power from VDDS_RTC or reduce the total capacitance to avoid or reduce this error?

4) Is there any other solution that I'm not seeing?


Thank you very much!!

  • 1. The issue most commonly occurs on start-up, where the PMIC transitions from a No-Supply to OFF state.


    In the OFF state, the PMIC has an option to current limit the VRTC LDO to ~100µA, configured within the BOOT mode.

    The A and A3 have the current limit in OFF mode. The A31 does not.


    During this initial OFF mode, if the attached loads (including VDDS_RTC) attempt to draw more than the current limit, the 1.8V LDO will not regulate properly and will be unable to adequately supply internal modules.

    As you have pointed out, not all applications pull >100µA on VRTC LDO when the device is off, so your risk truly depends on your application. I would have expected to see failures by now if you are hitting this condition.

    2. The settings specific to the device are in Table 2, wherein you will see there are only those few differences between devices.Yes, if you have the ability to adjust 1.5V up to 1.8V after boot via i2c, this would be the easiest option if you see returns on any existing designs.

    3. The best solution is to disconnect VDDS_RTC from the VRTC LDO. You should also remove any other loads from VRTC LDO that are not critical to your application.