Disabling JTAG on the UCD3138128 and UCD3138A64 will move the SPI input pins to the JTAG pins. The SPI pins mapped as outputs will appear both on the original pins and on the JTAG pins.
The boot ROM on the UCD3138128 enables JTAG if the flash checksum is not valid. This will put the SPI and JTAG pins at the spots described on the data sheet
If the checksum is valid, the boot ROM will leave the JTAG disabled. This will move the SPI pins to JTAG.
It is possible for the firmware in flash to enable the JTAG to move the SPI pins back, but this will make it possible to dump the flash program through the JTAG.
If both JTAG debugging in development and IP security in production are desired, it is possible to use the GIO registers to disable the JTAG. For the production code, first use the GLBIO registers to make all the JTAG pins into outputs, and then enable JTAG. This will keep the SPI pins at the same place, put make the JTAG essentially unusable.
The bit which controls JTAG disable is bit 2 in the IOMUX register. 0 means that JTAG is enabled, 1 means that JTAG is disabled.
To enable JTAG, this is the code:
MiscAnalogRegs.IOMUX.bit.rsvd1 = 0;
In newer codes, it is called JTAG_MUX_SEL, so the code is:
MiscAnalogRegs.IOMUX.bit.JTAG_MUX_SEL = 0;
Note that this only applies to the UCD3138128 and UCD3138A64 devices.
