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bq24617 Question

Martin Risso
Intellectual 470 points

Hi,

Do you see any problem with this design.

Use Vref to turn on an N FET that turns on a P FET to supply the top of the Voltage feedback divider. This is so that when there is no "adapter" power and the charger is off, the battery isn't supplying the feedback resistor divider?

Marty

  • 0
    TI__Expert 8690 points
    Hi Martin,

    Assuming a 5S battery (21V) with the VFB resistors at 500k in series, your discharge current will be less than 50uA. Is this reasonable to block using NFET + PFET?

    To answer your question, I don't find any issue, apart from adding more to your BOM.

    Thanks,
    Steven
  • 0 in reply to Steven Bangdiwala
    Intellectual 470 points
    Hi Steven,

    Thank you for the reply.

    Actually, I had to use a lower feedback resistance so I'm draining 100 uA in the divider. And the system is a long backup that periodically wakes up, does some measurements and then goes to "sleep" again. So the divider drain can be up to 72 hours on backup battery, it adds up.

    One more question. If I want the uC to be able to enable or disable the timer / termination, do you see any problem that I would have if I had a timer capacitor from the TTC pin to ground with an N FET across it so turning on the N FET would disable timer and termination?

    Marty
  • 0 in reply to Martin Risso
    TI__Expert 8690 points

    Marty,

    We have not tested this method in particular, though it does make sense to use an NFET in parallel to GND. The problem I see here is that the time/capacitance ratio could be different from spec because you are adding an additional component to TTC.

    Thanks,
    Steven