LP2951-50DRGR power dissipation (SON package)

Ramasamy Venkatachalapathy33

Hi,

We would like to use LP2951-50DRGR (SON PKG) in our product. Our power requirement is as follows

1. Input voltage-24V, Output Voltage-5V, Output current- 30 to 50mA.

2. Our board is 6 layer board with 1 dedicated GND, 1 dedicated power layer. Size of our board is 1.75 inch x 2.75 inch. Maximum area of copper pour including GND, PWR, DAP available is 15 mm2 in top and same can be provided at the bottom as well. Voltage regulator will be placed in top of the board.

3. Maximum operating ambient temperature for our product is 40°C.

4. From the datasheet, i found thermal resistance RθJA as 52.4 °C/W.I am unable to find RθJC (thermal resistance till case bottom) Considering that in our board we really don't have lot of space in top/bottom to have copper pour ( Only 15 mm2 in top is availabe) what RθJA should be used for calculation? I tried to do thermal simulation in workbench for the same but I am unable to find simulation model for LP2951CSD/NOPB (SON package, SOIC package is available) in TI website. Could you please provide recommended thermal resistance for power dissipation calculation in our board?

LP2951-50DRGR

over 9 years ago

0 Michael J Schultis over 9 years ago

TI__Mastermind 24975 points

Hello,

As you show, the DRG ThetaJA is 52.44. Based on your input voltage, output voltage, and loading conditions, if you assume this ThetaJA value, which would be worst case, then your device would only increase in temperature by 49.8 degrees. This under worst case would put the device temperature at 90 degrees which is within the limit.

Any additional copper or vias from the thermal pad would only help to alleviate this temperature increase, so I do not believe you have any concerns given that the device should be just fine under what is considered worst case.

Best,
Michael

0 Ramasamy Venkatachalapathy33 over 9 years ago in reply to Michael J Schultis

Prodigy 100 points

Hi,

Thanks for your explanation. We are planning to test this LDO for our application and would like to measure the Junction temperature. I would like to get Psi-jb (Ψjb): Junction-to-Board, Psi-jt (Ψjt) Junction-to-Top of Package values for LP2951-50DRGR (SON PKG) which will be helpful to find Junction temperature of the IC for our application/board geometry. We are planning to identify ambient temperature/load limitation of this LDO for our board geometry/application for which these values wiill be useful to find Junction temperature during thermal shutdown (when Vout is 6% below nominal value). I am unable to find Psi-jt (Ψjt), Psi-jb (Ψjb) value in product datasheet

0 Michael J Schultis over 9 years ago in reply to Ramasamy Venkatachalapathy33

TI__Mastermind 24975 points

Hello,

I will need to request for these values. Please allow for a few days turnaround to respond with these values.

Best,
Michael

0 Michael J Schultis over 9 years ago in reply to Michael J Schultis

TI__Mastermind 24975 points

Hello,

Here are the values for the LP2951-50DRG:
Psi-jb (Ψjb) - 29.5 C/W
Psi-jt (Ψjt) - 1.8 C/W

Best,
Michael

0 Ramasamy Venkatachalapathy33 over 9 years ago in reply to Michael J Schultis

Prodigy 100 points

Hi Michael,

Thank you for your kind support.

0 Michael J Schultis over 9 years ago in reply to Ramasamy Venkatachalapathy33

TI__Mastermind 24975 points

Very happy to help.

Please continue to post on the forums if you have additional questions!

Best,
Michael

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LP2951-50DRGR power dissipation (SON package)