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AM572x GPEVM PMIC design

prachi panse1
Intellectual 980 points
Other Parts Discussed in Thread: TPS22965, TLVH431

Hi,

I was referring to the AM572x General Purpose EVM Processor Module's PMIC section. Here, a transistor based circuit is used between the VDD_1V8 supply and the VDD_SD supply. A similar circuit is also used between the VDD_3V3 and the VDD_1V8 and between VDD_SHV5 and VDD_1V8 supplies (present at sheet numbers 4 and 6). I have not been able to understand how this circuit would work.

Can you please explain me the requirement and the functionality of this circuit?

Regards,

Prachi

  • 0
    TI__Genius 16410 points
    Prachi,

    These shunt regulators are used to control the power-down sequence in case power is lost. I believe there is a maximum voltage difference between 1.8V and 3.3V rails. This shunt regulator ensure they will not exceed this maximum difference.

    Note that it is recommend to make sure the PMIC is supplied through its power-down sequence (1ms) before power is removed from the PMIC. But this circuitry was added as an extra protection.

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 980 points

    Dear Karl,

    Thanks for your response.

    In AM572x GPEVM schematics, we understand that the shunt regulator circuit used between 3.3V (VDDSHV) and 1.8V (vdds18v) rails of the processor is to prevent the maximum difference between these rails from exceeding 2V during power down. We have the following queries w.r.t this shunt regulator circuit.

    1. On AM572x GPEVM, PMIC - TPS6590374ZWSR with OTP version 0x80 is used. As per the PMIC user guide, the power down delay between VDDHSV sources – LDO1, REGEN1 (used to enable external load switch - TPS22965), LDO2 and VDDS18V source – SMPS8 is 1000us. Also as per the load switch - TPS22965 data sheet, the worst case off time (turn-off time + fall time) is less than 100us. Thus we have sufficient gap between the power down of 3.3V and 1.8V rails. With this gap, do you see the issue of the 3.3V rail exceeding 1.8V rail by 2V during power down? If not, then why is the shunt regulator circuit provided?

    2. As per our understanding for this circuit to function as regulator, the cathode voltage/current of the shunt regulator - TLVH431 should be fed back to the reference input pin (closed loop mode). However this is not done in the EVM schematics where the feedback resistor between cathode and reference input is not mounted. Based on this, please confirm if this regulator circuit is only given as a provision for extra protection and not implemented by default?

    Regards,

    Prachi

  • 0 in reply to prachi panse1
    TI__Genius 16410 points
    Hello Prachi,

    1. No, under normal conditions the shunt regulator is not required. However, consider the case where the PMIC supply voltage is discharged within a short time, like 500us. Even though the PMIC will start sequencing down, there will not be input power to supply 1.8V and 3.3V, and both will start to decay. Adding a shunt regulator can add protection in this case.

    2. I mentioned before that it is recommend to keep the PMIC supplied for 1ms to allow it to complete the power-down sequence required by the processor. It could be that the circuit was not fully populated because this requirement is being met. It could be for reference only. It is not required if you can hold the PMIC supply for 1ms after power-down is initiated.

    If you have more specific questions about under what conditions the shunt regulator is required, you may want to ask in the Sitara forum, since it is based on the AM572x power-down sequence requirements.
    e2e.ti.com/.../

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 980 points

    Dear Karl,

    Thanks for your response.

    I have a question regarding the query no.2 -  As per our understanding for this circuit to function as regulator, the cathode voltage/current of the shunt regulator - TLVH431 should be fed back to the reference input pin (closed loop mode). However in the EVM this feedback resistor between cathode and reference input is not mounted. Can you please confirm if this resistor is required for the circuit to function correctly? Also, if yes, then what should be the value of this resistor? 

    Regards,

    Prachi

  • 0 in reply to prachi panse1
    TI__Genius 16410 points
    Hello Prachi,

    I don't think that resistor between cathode and reference is required. If you look at the TLVH431 datasheet section 10.2.2, it looks like this is the circuit implemented in the AM572x EVM. The resistor divider R424/R425 sets the reference voltage to be ~1.2V relative to the anode.

    Regards,
    Karl