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LM5067 - Power Limit

kai siang loh
Prodigy 10 points
Other Parts Discussed in Thread: LM5067

Hi,

I would like to understand how the Power Limit Equation is derived

and also how do I interpret the Power Limit specs in the datasheet

thanks

kai siang

  • 0
    TI__Genius 15780 points

    Hi Kai,

    This part falls under the Power Interface forum.  I will go ahead and move this post.

    Thanks,

    Alek Kaknevicius

  • 0 in reply to Aleksandras_Kaknevicius
    TI__Genius 12621 points

    Hi Kai Siang,

    The LM5067 power limit equation is derived based on design calculations but does not account for non-idealities of the internal current sense amplifier nor within the power limiting engine. Specifically, systematic offset will cause variation in the power limit, especially at low Vsns voltages.

    The spec in the datasheet means that if the voltage across the MOSFET is 24V and the Rpwr is set to 75kohm, then that means the controller is trying to regulate 22mV across the sense resistor. At this set point, it can range +/- 5.5mV over temperature.

    This regulation point of 22mV +/- 5.5mV has an error due to variation of systematic offset and of gain error.

    So if you set the power limit very low (such as 1mV), then you will have significant error if the systematic offset can be as high as 2mV for example.

    For guidance on designing a robust hot swap, we recommend using the LM5067 design calculator tool at www.ti.com/hotswap --> "Tools & Software".

    We also have an application note with all of the equations and methodology behind the design tool at www.ti.com/hotswap --> "Technical Documents" --> "Robust Hot Swap Design".

    Finally we have tutorial videos at www.ti.com/hotswap --> "Support & Training".

    Thanks,
    Alex