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LM5122 - SS Low During Operation

James Donald
Prodigy 60 points
Other Parts Discussed in Thread: LM5122

I am using the LM5122 in an interleaved boost configuration.  

When running more than 20% of rated current the SS pin drops to 1.05V causing the output voltage to be low.  Otherwise the converter seems to be running OK over the full input voltage and current range.  The rate of drop indicates the current sink on the SS pin is 10uA.

The RES pin never indicates Hiccup mode and I shorted it to ground to eliminate this as a possible problem.  The UVLO pin is always above 1.2V and the problem happens over the whole input voltage range.   Vcc is stable and never goes below 6V.

What other conditions would pull the SS pin low?

James Donald

  • 0
    TI__Guru 58171 points
    Hi
    Thermal shutdown and VCC UVLO can pull the SS down.
    Regards,
    EL
  • 0 in reply to EricLee
    Prodigy 60 points
    I tested the VCC and UVLO faults and they seem to pull down the SS hard with much greater than 10uA. This does not act like a VCC or UVLO faults. I looked at these lines with a scope and I don't see any noise spikes greater than 1ns. Could periodic noise spikes <1ns cause the SS to pulled down with 10uA current until 1.05V?

    The package temperature is not above 30C. Is it possible to trigger thermal shutdown do to localized heating? What might cause this heating without increasing the package temperature?
  • 0 in reply to James Donald
    TI__Guru 58171 points
    Hi James
    Can you post your schematic for my review?
    Regards
    EL
  • 0 in reply to EricLee
    Prodigy 60 points

    Hi Eric,

    Here is the schematic of my boost converter.

    BoostConverter2016.pdf

    I am still having the problem.  Increasing the gate resistor of the LO transistor to 1 ohm reduces the problem, but significantly reduces efficiency.  The problem only happens when the HI transistors are active.  Reducing the gate resistor to 0.5 ohms, results in the SS pin ranging from 4V to 1.2V depending on the current draw.

    Vcc and UVLO are definitely not going below their limits.  The problem is independent of input voltage except near the low limit of operation the SS pin voltage goes higher with the 0.5 gate resistor.

    James Donald

  • 0 in reply to James Donald
    TI__Guru 58171 points
    Hi James
    Would you please try one more time after populating a Schottky diode between SW and PGND, very close to the IC ?
    Regards,
    EL
  • 0 in reply to EricLee
    Prodigy 60 points
    Eric,

    I put a Diodes B360A 2mm from SW and PGND on each LM5122. No change.

    The impedance between the transistors, SW and PGND is very low. Maybe I need to add a little resistance between SW and the transistors. What would be a good value?

    I have set the LO gate resistors so SS runs about 1.25V, so it now regulates to the correct voltage. I assume that if SS is not 4V there is still a problem.

    There maybe a little dv/dt turn-on of the HI transistor during the LO turn-on. Is it correct that if I jumper RES to ground, the over current will not affect SS?

    It is strange that SS goes low only when the HI transistors are active. If it was a dv/dt shoot-through problem I would expect the problem to be uncorrelated with the HI transistor activity.

    James
  • 0 in reply to James Donald
    TI__Guru 58171 points

    Hi James

    SW node should be connected to the source of the high-side MOSFET. If you need a gate resistor, please populate it between HO and the gate of the high-side MOSFET. (5~15 ohm).

    Yes, if you connect the RES to ground, the SS will not be affected by current limit.

    Regards,
    EL