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BQ7693003DBT-Protection Features

Hi, 

I'm trying to set up of the BQ7693003DBT with a pic.I tested the write and Rread and they work. Can you explain to me what are the registers to configurate for the overcurrent and Short circuit protection? And should i impliment an algorithm to activate the Protection FETs or it will work only by confugurating the right registers?  Can you explain this more please. Thank you

  • The OCD and SCD protections are always active and cannot be disabled.  The part will respond to the thresholds set without any intervention by the MCU.  Short circuit protection is a very fast large magnitude event, it is set with the Protect 1 register, 0x06. Over current protection is a lower current longer time protection which is still relatively quick, faster than you may be able to measure current.  OCD is set with the Protect 2 register 0x07.

    As an example, suppose a system runs at up to 5A and the designer selects a 10 mOhm sense resistor.  The nominal sense voltage will be up to 50 mV.  Perhaps the system should shut off if it draws more than about 7A for 1/2 second, with tolerances the designer might select an OCD threshold of 72mV and a delay time of 640 ms.  The Protect 2 register would then be set to 0x6A, and the RSNS bit should be set in Protect1.  Perhaps the designer knows the system can never draw more than 10A and the battery can always produce more than 30A when shorted, so any of the SCD thresholds between 100 and 200 mV would be suitable.  The designer might select SCD_D = 0x1 and SCD_T = 0x4.  OCD settings selected need the RSNS =1, so the Protect 1 register then is set to 0x8C.  At power up the MCU sets these registers and any others needed. Periodically during operation the designer has the MCU check the settings of these registers.  Perhaps the designer determines that the system should never be allowed to run with more than 5.5 A for 10 s, the CC is used by the MCU to measure the current and an OC threshold is designed into the MCU code.  Current is calibrated at production.  At system startup, if the MCU somehow skipped setting the Protect 1 and 2 registers but enabled the discharge FET, the SCD and OCD threshold would be at default, 22 mV and 8 mV.  The battery would protect at too low of a current for the full range of system operation.

    During operation the CC is read, filtered and checked against the OC threshold by the MCU.  If this OC threshold is exceeded, the MCU must turn off the discharge FET.  If there is a faster SCD or OCD event, the AFE will turn off the discharge FET and the MCU must determine what event turned off the discharge FET from the status register.  Regardless of which mechanism turned off the discharge FET the MCU must perform an appropriate recovery sequence.

  • Thank you very much,

  • If i inderstand well, after the suitable set up of Protect1 and protect2 registers and after enabling the [CHG_ON] and [DSG_ON] bits ,the discharge FET will be automatically turned off if there is SCD or OCD events, but the MCU shoud chek and enable the [CHG_ON] and [DSG_ON] bits after those events?
  • Yes, after an OCD or SCD the MCU must perform a recovery operation.  The SCD or OCD event will set the appropriate status and turn off the DSG_ON (datasheet table 7-1).  The MCU might read and clear status. If load removal is used in the system clear CHG_ON, and check LOAD_PRESENT until cleared or timeout as appropriate. Once it has determined to turn on the output again it would set CHG_ON then DSG_ON.