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Priority Multiplexing for an Outdoor Sensor System using TPS25942A

Hoi Lun Lui36
Prodigy 20 points
Other Parts Discussed in Thread: TPS25942A

Hi

We are designing a power input protection and multiplexing circuit for a system using TPS25942A. This is the scenario:

  • The system is a data acquisition system to be installed outdoors
  • To maximize the data availability of the system we multiplex between two power supplies (it's common for power supplies to fail outdoors)
  • The primary supply needs to have priority over the secondary supply, such that the secondary supply kicks in only when the primary fails
    • The primary supply is a mains-powered SMPS with a stable output of 12-14V
    • The secondary supply is a solar-powered SMPS with battery storage, providing a varying output between 11-15V
  • Wherever possible, the protection features of TPS25942A should be fully utilized for both of the supplies


Figure 79 and Figure 84 provided by the datasheet of TPS25942A shows the example implementations suitable for our application. However, we are having a great deal of indecision over the two choices due to incomplete understanding.

The implementation in Fig. 79 achieves priority multiplexing by wiring PGOOD of the Master to OVP of the Slave, sacrificing the overvoltage protection of the Slave. Fig. 84's implementation, on the other hand, connects PGOOD to DMODE, activating the Slave in non-ideal diode mode when the Master fails. Though it is mentioned in section 10.4.1 that the overload current limit is set to 50% of the value determined by R-lim, we fail to see why Fig. 84's implementation is not superior to Fig. 79's.

In particular, the latter configuration does not sacrifice any of the protection features while the former one does. The latter implementation even offers a smoother transition between the supplies. What are the drawbacks of the latter over the former implementation? Here are our questions:

  1. Are all the protection features (OVP, UVLO, ILIM, Short, Reverse) available under the non-ideal diode mode (activated by DMODE)?
  2. How does the diode mode really work? We speculate, based on Fig. 48, that the diode mode works by turning the series-pass PFET on the output side on while the one on the input side off, therefore shunting all the current through the body diode of the input side PFET. Is this how the diode mode works? If it is,
  3. Is the diode mode dissatisfactory in that the current allowed to pass through the diode is quite lethally limited? If it is,
  4. What is the maximum power allowed to dissipate on the diode?
  5. In Fig. 79's implementation, rather than driving the Slave's OVP by the PGOOD output from the Master, can the PGOOD output be used to drive a MOSFET (with Ron chosen to be negligible), which in turn drives an OVP voltage divider (like R2 and R3 of the Master) to provide overvoltage protection to the Slave?


Thanks and Regards

Henry

  • 0
    TI__Intellectual 2800 points
    Hi Hoi,

    Thank you for your interest in the TPS25942A. We apologise for the delay in response due to system error.

    Here is our feedback:

    1. Are all the protection features (OVP, UVLO, ILIM, Short, Reverse) available under the non-ideal diode mode (activated by DMODE)?

    [TI] Yes. All protection features are available in DMODE except current limit is reduced to 50%.

    2. How does the diode mode really work? We speculate, based on Fig. 48, that the diode mode works by turning the series-pass PFET on the output side on while the one on the input side off, therefore shunting all the current through the body diode of the input side PFET. Is this how the diode mode works? If it is,

    [TI] Propitiatory circuits used in DMODE function. The device works as non-ideal diode when DMODE pin is high.

    3. Is the diode mode dissatisfactory in that the current allowed to pass through the diode is quite lethally limited? If it is,

    [TI] Current is allowed in DMODE without any restriction. Current limit is reduced to half to reduce power dissipation.

    4. What is the maximum power allowed to dissipate on the diode?

    [TI] Power dissipated in non-idea diode mode is Pd = 0.6*ILOAD. Thermal shutdown is active during DMODE to protect the device.

    5. In Fig. 79's implementation, rather than driving the Slave's OVP by the PGOOD output from the Master, can the PGOOD output be used to drive a MOSFET (with Ron chosen to be negligible), which in turn drives an OVP voltage divider (like R2 and R3 of the Master) to provide overvoltage protection to the Slave?

    [TI] No issues in this implementation as long as the slave device can enter DMODE.

    Regards,
    Venkat