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bq76925 internal regulator during sleep mode

Other Parts Discussed in Thread: BQ76925

I am using the bq76925 in an application.  We are taking advantage of the sleep mode.  When we enter sleep mode, we measure that the 3V3 regulator goes to 0V to ensure that the wakeup circuitry is arm'd, per the data sheet.  Is there a tolerance on how close to 0V we should expect to see?

  • The part does not have a spec for what is "0" V. The threshold is likely to vary with parts and temperature. A value of 0.3 V or below is likely suitable, but there is no specification.
  • When the host commands the bq76925 to SLEEP ( witting 1 into the control bit POWER_CTL )  all the  LDO are shutoff. Only the WAKEUp signal is active.

    Prior to WAKE be armed, the , the 3.3V is bled to Zero voltage ( internal pull- down of 3.3K to  VSS) .  In Sleep node, if 3.3V is measured....  its will be close to

    GND ~ .0001uV

  • Thank you!

    Another related question: Is there a spec on how long the 3.3V regulator takes to come up after exiting sleep mode?
  • Hi Jon,
    The regulator startup will depend on the cap attached. For the condition stated the spec would be tWAKE_DLY in section 7.6 of the data sheet (1 ms).
    For other loading you might estimate delay from I = C x dV/dt or manipulate to dt = startup time = C x dV/I where C = regulator load capacitance, dV = the regulator output voltage (3.3V), and I = the short circuit current of the regulator (10 mA min). Note that the current will be higher for most parts and conditions.

  • Thanks for the reply, this makes sense to me that the delay from when the regulator is enabled until when it settles at 3.3V would be related to its load capacitance.

    Is there any delay between pulsing the "alert" pin to 3.3V and when the LDO is enabled?
  • Hi Jon,
    It does not have an separate spec. It is a low power comparator delay, likely sub or few microseconds, any delay is lost in the regulator startup spec of 1ms.