lp3971/lp3972 and PXA3xx_Design_Guild design questions

Hi Oscar,

I've deleted the additional duplicate posts and preserved this one.

I didn't find any records of an LP6971 or LP6972; are you sure this is the correct part number? It may be outside of my organization but I also did not see anything on the web or any other E2E posts with this part number.

Hi Kevin,

I modified the lp6971/6972 to lp3971/3972.

Thanks for your help.
Oscar

Hi, Please see the reply below

1. In PXA3xx, we find the nRESET_OUT pin to inform the PMIC lp3971/lp3972.

Which input pin of PMIC is nRESET_OUT?

nRSTI pin

2. In lp3971/lp3972 power on sequence, there are 2 reset signal(nRSTO, nRESET_OUT).

What is the difference between them?

nRSTO is output pin, reset output from PMIC to the processor
nRESET_OUT is signal coming from processor

3.In PXA3xx, we find the nRESET_GPIO pin to do the software reset for processor.

Which output pin of PMIC is nRESET_GPIO?

nRSTO

4. In lp3972, do LDO1 and LDO5 have ramp function ?
no sure what ramp function you referred to, same as Buck?

5. There are a lot of models in lp3971/lp3972. How should we choose them?

based on default voltage and enable options

6. We know the default voltage of VRTC is 2.8V.
If we enable the tracking function to LDO1(lp3971), is it possible to adjust the VRTC to 1.8V?

no, minimum 2.8V

Hi Sheng Jin,

Thanks for your replay.

We still have some questoins as follows.

1. If nRESET_OUT is the nRSTI pin, which input pin of PMIC is nRESET in PXA3xx ? 

2. In PXA3xx, nRESET_OUT is software reset, how to do the hardware reset if we push the power on button(PWR_ON).

3. Dose the PWR_ON signal could reset the logical control and register block?

4. In nRSTI definition, we see "Typically a push button reset.". What does that mean and the differene between PWR_ON and nRSTI if it is a push button reset. 

5. Based on power on sequence step 9(nRESET_Out) of lp3971, the processor will reset PMIC after SYS_EN and PWR_EN.

    Is this reset is nesessary? What is the effect while PMIC receive reset signal after SYS_EN and PWR_EN pull high ?

6. About ramp function on lp6972, we know LDO1, LDO5 and BUCK1 have 2 target voltage.

   BUCK1 also has ramp function like VCC_APPS Voltage Ramp Control.  But we don't see the same ramp contorl for LDO1 and LDO5.

   We want to know LDO1 and LDO5 have default ramp speed(ramp function I mention) or only BUCK have ramp funciton.

7. LDO_RTC is the same Vrtc in the spec.?   If we enable the Vrtc tracking function fo LDO1,  the voltage could be set to 3.3V if LDO1 support this voltage?

 

Thanks for your great help.

Oscar

1: If nRESET_OUT is the nRSTI pin, which input pin of PMIC is nRESET in PXA3xx ? 

I don't have any information about PXA3xx except datasheet. I take the previous answer back, the nRESET_OUT is not the nRSTI pin, its a signal telling the reset/power is in progress/ not ready yet, active logic low. sorry.

2. In PXA3xx, nRESET_OUT is software reset, how to do the hardware reset if we push the power on button(PWR_ON).

I don't see how to use PWR_ON to do hardware reset; but you could set up the nRSTI pin to both software and hardware/button reset.

3. Dose the PWR_ON signal could reset the logical control and register block?

No

4. In nRSTI definition, we see "Typically a push button reset.". What does that mean and the differene between PWR_ON and nRSTI if it is a push button reset. 

means it typically used as a hardware reset input, and active logic low, and PWR_ON is a wake up/enable signal, active logic high.

5. Based on power on sequence step 9(nRESET_Out) of lp3971, the processor will reset PMIC after SYS_EN and PWR_EN.

    Is this reset is nesessary? What is the effect while PMIC receive reset signal after SYS_EN and PWR_EN pull high ?

as i mentioned in Q1, this nRESET_Out is not RESET signal input to PMIC

6. About ramp function on lp6972, we know LDO1, LDO5 and BUCK1 have 2 target voltage.

   BUCK1 also has ramp function like VCC_APPS Voltage Ramp Control.  But we don't see the same ramp contorl for LDO1 and LDO5.

   We want to know LDO1 and LDO5 have default ramp speed(ramp function I mention) or only BUCK have ramp funciton.

only bucks have ramp control function

7. LDO_RTC is the same Vrtc in the spec.?   If we enable the Vrtc tracking function fo LDO1,  the voltage could be set to 3.3V if LDO1 support this voltage?

Yes, they are same, the note4 on datasheet pg7 says"it will tack the LDO1 voltage within 200mV down to 2.8V".

Hi Sheng Jin,

On INITIAL COLD START POWER ON SEQUENCE of LP3971.

Why the t5 is the time form PWE_EN to nRSTO ?

Thanks

Oscar

Hi, Oscar

I believe this is a typo, cause the nRSTO is PMIC output to processor, and t5 is the signal nRESET_OUT/output from processor.

Hi

nRESET_OUT is a signal telling the reset/power is in progress/ not ready yet, active logic low.

If we want to use this signal, which pin we should connect to PMIC? (I don't see nRESET_OUT pin in LP3971)

 

Thanks

Oscar

LP3971 doesn't have nRESET_OUT pin, the only reset output signal from PMIC/lp3971 is nRSTO;
The nRSTI is pin to reset the PMIC/lp3971 (internally pulled high), so normally using push button...

Hi,

In lp3971.pdf THERMAL MANAGEMENT, Could we use bct<2:0> to measure the temparature of our system(Not in factory)?
If the answer is yes, how to use them?

Thanks
Oscar

Hi Oscar,

No, these registers are accessible by factory ONLY. 

Hi Sheng Jin,

Are these regisers accessiable by factory ONLY on lp3972, too? (the previous one is on lp3971)

Thanks

Oscar