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TPS650842 (for Intel Braswell N3010) power sequence problem

Kevin Chen
Intellectual 390 points

Hi,

I have a question about TPS650842 in Intel braswell platform(N3010)

1.  In the cold boot sequence,  every voltage rail is right, and the SOC(N3010)pull up the SLP_S4_N & SLP_S3_N, make the system into S3 mode. But after TPS650842 pull the COREPWROK & VCCAPWROK , the SOC PLTRST_N still low, the system cannot power up.  The sch is in attach file. please help , thanks!x86_n3000_core_0603no.pdf

 

  • 0
    TI__Genius 17380 points
    Hi Kevin,

    Given that VCCAPWROK and COREPWROK are up, that would suggest that the power is all working as expected, at least as the PMIC sees it. You could try taking scope shots of the rails (particularly those enabled by SLP_S3B since the SoC seems to acknowledge the rails before SLP_S3B) and seeing if there are any glitches. Additionally, if you can check the voltages at the input caps to the SoC you could ensure that the correct voltage is being delivered to the SoC. Ultimately, Intel will likely be able to provide better support as it looks like the power portion is working properly.
  • 0 in reply to Kevin LaRosa
    Intellectual 390 points

    Hi Kevin,

    I checked the rails those enabled by SLP_S3B by using the scope and the power  sequence is right. But the VGG and VCC have some glitches during power up. The scope shot is in attach file, the blue one is the VGG, the deep blue one is the VCC. Is this platform during power up OK?  

    Thanks, 

    Kevin Chen

  • 0 in reply to Kevin Chen
    TI__Genius 17380 points
    Hi Kevin,

    That start up looks correct. We power on to 0.5V, then DVS in a controlled manner to the set VID value. Figure 5-4 shows this behavior.

    Overall this doesn't appear to be a power-related issue, perhaps the BIOS isn't loading properly? Do you see any action on the SOC_I2C0_SCL &
    SOC_I2C0_SDA lines?
  • 0 in reply to Kevin LaRosa
    Intellectual 390 points

    Hi Kevin,

    We didn't down load the code into SPI Flash, It's the cold boot without BIOS code.  The processor should pull up the PLTRST then fetching code from SPI interface. But the PLTRST in our board is still low.

    thanks!

    Kevin Chen