HI,
I am working on a project with LMG5200.
I carefully read through SNOSCY4B (TI document for LMG5200) and found that in page 10, it said
"HI and LI can be independently controlled to minimize the third quadrant conduction of the low-side FET for hard switched buck converters"
The document is talking about a third quadrant conduction when Low side SW is turned off and conducting a reverse current? ( like a body diode)
(In a synchronous buck converter, I think Low side SW should operate in third quadrant to replace the diode when it is tuned on.)
Thank you.