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Bq34z100 learning cycle, MaxError is always 0%

Other Parts Discussed in Thread: BQ34Z100, BQ34Z100-G1

Hi.

I have started the learning cycle for bq34z100 exactly according to the SLUA334B document after configuration according to section 9.2.2.1 Step-by-Step Design Procedure from bq34z100-g1 document SLUSBZ5. The process was good until reaching the step 5 of learning cycle in SLUA334B for known close Qmax value. In this step, after reaching the "Cell Terminate Voltage", the MaxError value should change to 5%. The problem is that the MaxError value is always 0% and doesn't change. Can you help me to find the reason?

Thanks before for your help.

  • MaxError should never be 0, so there must be a setup problem. Please send a log file should the problem and an srec from the pack and I will check the configuration.
  • Hi.

    First I apologize you because I made a mistake in the previous post. The problem in the learning cycle is that MaxError is always 100% (not 0%). I have attached the log file with the srec file. As I mentioned, the charge process is ok. When discharging the pack to "cell terminate voltage" multiplied by number of series cells i.e. 16*3000=48000mV, the MaxError and UpdateStatus don't change. Also the Cycle Count is remained 0.

    Thanks before for your help.log_learning cycle_Z100.rar

  • Rest periods are required for learning and you transition directly from charge to discharge to charge. Try following the process in this link.

    e2e.ti.com/.../1774822

    Also, I checked the data flash and it looks like you are using LiFePO4 cells. The pack was only charged to an effective cell voltage of 3283mV and this is not fully charged for ChemID 415. It needs to be charged above 3400mV for this ChemID. What does your cell manufacturer recommend? Also, are you planning to just to just discharge down to a 3000mV cell voltage? People usually discharge a little lower with LiFePO4 cells. A curious point is that the VOLTSEL bit is not set in the Pack Configuration register, yet the gauge was reporting the full pack voltage in the log file. Did this bit get reset at some point?
  • Hi.

    I did the learning cycle exactly the same as the link you proposed. Also, I performed the rest periods after the charge termination (2 hours from sample no. 1334 to 3251 in the log file). But the power consumption of the board and ICs can not be omitted and it is no more than 40 mA. In addition, when the charging in terminated (sample no. 1334), I receive the FirstDoD and DoDEOC bits activated correctly and after the rest the OCVTAKEN bit is also activated.  

    The max charge voltage is 3.65 V. The pack is also charged until a cell voltage reaches 3.65 V (sample no. 1333 in the log file, pack voltage is 53328 mV). But since the cells may be imbalanced, some cells do not reach the max charge voltage and therefore the parameters “Cell V at Chg Term” and “Cell Charge Voltage” are set such that this is compensated. Again for the discharge process the same decision is made, i.e. the min cell voltage in the pack reaches 2100 mV but due to imbalancement the “Cell Terminate Voltage” is set to 3000 mV.

    As you, I was concerned about the VOLTSEL bit but when I deactivate it, the pack voltage becomes zero! I don’t know what is the problem. It doesn’t get reset in the whole cycle.

    Thanks before for your help.

  • Any reply Tom?