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UCC27519 pull-up, pull-down values

Other Parts Discussed in Thread: UCC27519

I am currently working on  a design using the UCC27519.

Datasheet lists the EN pull-up as 200k, IN+ pull-down as 230k.

Spice model for this part has EN pull-up as 200k, IN+ pull-down as 200k.

Measurements on real-world parts show  EN pull-up as 230k, IN+ pull-down as 430k.

What is correct? Will these change again in the future? What tolerance on these values can I expect in the manufacturing process?

  • Hi Don,

    Generally speaking the pull down and pull up resistance have wide variations when it comes to temperature and process.

    We have seen it vary two fold at PVT corners for six sigma.

    I have asked our Systems Engineer responsible for this portfolio to provide further insight.

    Regards,

    Ritesh

  • WHAT?

    From the datasheet:
    Wide hysteresis (16% VDD typically) between the high and low thresholds offers
    excellent noise immunity and lets users introduce delays using RC circuits between the input PWM signal and the INx pin of the device.

    How can I possibly guarantee any RC timing when this internal resistor can vary over such a wide range? That makes this part essentially useless!

    I have been through 10 parts in the latest batch I ordered and they are all within 1-2% of the same value. Does this vary that much on a part to part basis? Or on a lot to lot basis?
  • Hi Don,

    Millions, if not more, of these parts are being used across multiple applications/industries for years and therefore I believe it is not useless.

    There is no explicit mention of enable pull-up resistance and input pull down resistance in the electrical characterization. The reason being, for most application this is not a concern. The main concern are the thresholds, which are very clearly mentioned in the characterization table which is good across process and temperature for a given VDD. Because it is mentioned as a percentage of VDD, I believe the percentage will hold good across different VDD levels as well.

    I am not sure how internally this pull-up and pull-down is implemented.

    Generally, at temperature extremes (-40C to 140C), the resistance variance may be wide, but that answer only design engineer can provide.

    Part to part variation for a given lot and at a given temperature is almost nothing, specifically at a sample size of 10.

    If you expect that the noise on your input lines is more than 16% (0.72V @ 4.5V VDD) of VDD, then it is recommended to filter the noise.

    Again, as I mentioned yesterday, I have asked the System Engineer who is responsible for this part to look into more detailed design.

    Let me know if I could be of any other help.

    Regards,

    Ritesh

  • OK, maybe that was a little harsh...

    With a little thought, I changed the design to minimize the effects of internal variation of the resistance. But I do need to know what the maximum variation of the resistance is to predict what effect it will have on my circuit performance. Is it possible the System Engineer you mentioned would have that information?
  • Hi Don,

    Sure. Let me also check with design engineer myself and see if he can help.

    Regards,
    Ritesh
    Systems Engineer