• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 63 subscribers
  • Views 638 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

integrated N Mos

fangyi jiang
Prodigy 150 points

hi sir

   i have a question that a load switch integrated N-FET as power FET,when Vgs>Vth,Vout got the same Voltage as Vin,according to the Mos's theory,Vout(Vs) should less than Vg,but it seems Vout equal Vin from the load switch spec

can you expain for me   ths

  • 0
    TI__Genius 15780 points

    Hi Fangyi,

    When our N-FET load switches are enabled, VIN=VOUT and the gate voltage on the power FET is higher than the voltage on the source (VOUT).  Can you please clarify your concern?

    Thanks,

    Alek Kaknevicius

  • 0 in reply to Aleksandras_Kaknevicius
    Prodigy 150 points

    hi alek

      eg,Vin=5V,want to control 5V output,when add a 3.3V to the enabel pin,FET will turn on,Vout get 5V,it seem right from the spec,

    but in this situation,Vg?=3.3V, if it's right,seems Vg<Vs,if not,what about the voltage of Vg?

    and if the Vgs must reach about 1.5V to turn on  the FET,so it means Vg must reach 6.5 V when Vs output 5V,how can Vg get the voltage within the load switch,pls tell the simple reason ths

  • 0 in reply to fangyi jiang
    TI__Genius 15780 points

    Hi Fangyi,

    Internally, there is a high voltage rail which is generated inside the load switch (higher than VIN), and this is applied to the gate of the pass FET to turn it on.  The enable voltage is not tied directly to the gate of the pass FET, it is only used to switch this higher voltage rail onto and off of the gate.

    Thanks,

    Alek Kaknevicius