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SND9039, watchdog debug?

David F. Chan
Expert 5470 points

Hi Team,

One of our Bay-area customers is using the SND9039 and is looking for a way to best debug the watchdog timer, are there any tools that can be used to handle this? Also, what is the min steps needed to read the thermistor? Should they be getting 36 I2C transactions per read every second?

  • 0
    TI__Expert 5450 points

    David,

    36 I2C transactions seems high for reading the ADC thermistor value.  Section 11.7.5 of the user's guide covers reading the BPTHERM value.  The general steps are:

    1. Get the interrupt status from the IRQ register at address 0x01 by checking if the ADCCOMPL bit (D2)
    is set to 1.
    2. If ADCCOMPL is set to 1, then the conversion completes, and the user can proceed to reading the
    value starting at step 11.
    3. If ADCCOMPL is 0, then enable internal bias for VREFT by setting the BPTHERMBIASEN (D7) bit in
    the ADCCTRL register at address 0x50 to 1.
    4. Wait at least 2 ms.
    5. Enable the ADC by setting the ADCEN bit (D5) in the ADCCTRL register at address 0x50 to 1.
    6. Select the BPTHERM channel by setting the ADCCHSEL[1:0] bits (D[2:1]) in the ADCCTRL register at
    address 0x50 to 0x2.
    7. Wait at least 50 μs.
    8. Send the ADC conversion request by setting the ADCSTART bit (D0) of the ADCCTRL register at
    address 0x50 to 1.
    9. Wait 300 μs for the conversion to complete.
    10. Check that the ADCCOMPL bit (D2) is set to 1 in the IRQ register at address 0x01, which indicates
    that the conversion is complete
    11. Read the BPTHERML[7:0] bits from the BPTHERMLO register at address 0x59 and save as LSB in an
    integer.
    12. Read the BPTHERMH[1:0] bits from the BPTHERMHI register at address 0x58 and bit shift left 8 bits.
    Perform a bitwise OR with the previous value to obtain the full 10-bit battery temperature value.
    13. Clear the ADCCOMPL IRQ by writing a 1 to the ADCCOMPL bit (D2) in the IRQ register at address
    0x01. While the value of the ADCCOMPL bit will already be 1 when the conversion is complete, writing
    a 1 to that bit causes the PMIC to reset the bit back to 0.

    If they are seeing 36 I2C transactions my guess would be that they are polling on the IRQ register too frequently to see when the conversion is completed.

    Chase

  • 0 in reply to Chase Maupin
    TI__Expert 5470 points

    Hi Chase,

    Thanks for the response. Regarding the " Check that the ADCCOMPL bit (D2) is set to 1 in the IRQ register at address 0x01, which indicates that the conversion is complete" step, if this bit is not set, what would be the proper way to proceed (wait longer, restart the process, etc)?

    Do you have any feedback concerning things that can be addressed/preconfigured to help determine the cause of the watchdog issue, and are there any specific bits that can be read to determine more about the shutdown case that the customer is seeing?

  • 0 in reply to David F. Chan
    TI__Intellectual 1360 points

    David,

    If the ADCCOMPL bit is not set, please check SIRQ Status Register, SADCCOMPL bit(D2) to check if ADC is busy. If ADC is busy, wait longer else you can start the process again.

    For shutdown, you can read powerup/Power down reason register(0x12) and IRQ interrupt register(0x01) to know the reason. Also during reset, Vsys should always be greater than 1.8V, elese the register reset to default values. You can also monitor IRQ pin.

    Thanks,

    Jay