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TWL6032 State change power on sequence timing control question

charlie zhou
Prodigy 220 points

  there are default  Power on Sequence from PMIC On.off, the TWL6032A2B4 Default Startup and Shutdown Sequences shows 550uS delay for each channel.

I have a request need PREQ1 toggle ,for example SMPS1/SMPS2/SMPS3 need power on/off sequentially and delay is 600uS,

       Q1  where is related register to control the each channel turn on and off delay(600uS)  

     Q2  is slew rate  only controlled  by SMPSx_CFG_STEP,  I think only SMPS5/1/2 (DVS has that control),  how will PMIC ontrol others slew rate? 

  • 0
    TI__Genius 17380 points

    Hi Charlie,

    Q1: As mentioned in the datasheet, the sequence for PREQ1 is hardcorded in the OTP memory and cannot be changed. Looking at the TWL6032A2B4 EPROM bits application note (SWCA170B), the sleep sequence for this OTP just disables all assigned rails simultaneously. If you need to sequence, you could look into using multiple PREQ signals or enabling/disabling by I2C instead of by pin.

    Q2: LDOs and non-DVS-SMPS (BUCK3/4) can have their output voltage values changed during operation but the slew rate is not specified and may vary system to system.